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http://dx.doi.org/10.5762/KAIS.2010.11.4.1222

Design of the LDO Regulator with 2-stage wide-band OTA for High Speed PMIC  

Kwon, Bo-Min (Department of Nano Systems Engineering, Center for Nano Manufacturing, Inje University)
Song, Han-Jung (Department of Nano Engeering, Inje University)
Publication Information
Journal of the Korea Academia-Industrial cooperation Society / v.11, no.4, 2010 , pp. 1222-1228 More about this Journal
Abstract
This paper presents a design of the CMOS LDO regulator with a fast transient response for a high speed PMIC(power management integrated circuit). Proposed LDO regulator circuit consists of a reference voltage circuit, an error amplifier and a power transistor. 2-stage wide-band OTA buffer between error amplifier and power transistor is added for a good output stability. Although conventional source follower buffer structure is simple, it has a narrow output swing and a low S/N ratio. In this paper, we use a 2-stage wide-band OTA instead of source follower structure for a buffer. From HSPICE simulation results using a $0.5{\mu}m$ CMOS standard technology, simulation results were 16 mV/V line regulation and 0.007 %/mA load regulation.
Keywords
PMIC; LDO Regulator; Dropout Voltage; OTA; Buffer;
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