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Heuristics for Scheduling Wafer Lots at the Deposition Workstation in a Semiconductor Wafer Fab  

Choi, Seong-Woo (Department of Business Administration, Hoseo University)
Lim, Tae-Kyu (Supply Planning Team, GS-Caltex Oil)
Kim, Yeong-Dae (Department of Industrial Engineering, Korea Advanced Institute of Science and Technology)
Publication Information
Journal of Korean Institute of Industrial Engineers / v.36, no.2, 2010 , pp. 125-137 More about this Journal
Abstract
This study focuses on the problem of scheduling wafer lots of several product families in the deposition workstation in a semiconductor wafer fabrication facility. There are multiple identical parallel machines in the deposition workstation, and two types of setups, record-dependent setup and family setup, may be required at the deposition machines. A record-dependent setup is needed to find optimal operational conditions for a wafer lot on a machine, and a family setup is needed between processings of different families. We suggest two-phase heuristic algorithms in which a priority-rule-based scheduling algorithm is used to generate an initial schedule in the first phase and the schedule is improved in the second phase. Results of computational tests on randomly generated test problems show that the suggested algorithms outperform a scheduling method used in a real manufacturing system in terms of the sum of weighted flowtimes of the wafer lots.
Keywords
Scheduling; Semiconductor Wafer Fabrication; Deposition; Heuristics;
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Times Cited By KSCI : 1  (Citation Analysis)
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