1 |
http://www.eecg.toronto.edu/-corinna/DSP/infrastr ucture/UTDSP.html
|
2 |
G. S. Sohi, S. E. Breach, and T. N. Vijaykumar, "Multiscalar Processors," Proceedings of the 22nd annual international symposium on Computer architecture, pp. 414-425, May 1995.
|
3 |
T-Y. Yeh and Y. N. Patt, "Alternative Implementations of Two-Level Adaptive Branch Prediction," in Proceedings of the 19th International Symposium on Computer Architecture, pp. 124-134, May 1992.
|
4 |
A. Rico, A. Duran. F. Cabarcas, Y. Etsion, A. Ramirex, and M. Valero, "Trace-driven Simulation of Multithreaded Applications," ISPASS, Apr. 2011.
|
5 |
T. Austin, E. Larson, and D. Ernest, "SimpleScalar : An Infrastructure for Computer System Modeling," Computer, vol. 35, no. 2, pp. 59-67, Feb. 2002.
DOI
ScienceOn
|
6 |
I. Jeon, S. Kang, H. Yang, "Development of Security Quality Evaluate Basis and Measurement of Intrusion Prevention System," Journal of the Korea Academia-Industrial cooperation Society, v.11, no. 4, Apr. 2010.
과학기술학회마을
DOI
ScienceOn
|
7 |
D. K. Lee, J. H. Kwon, "Social Search Algorithm considering Recent Interests of User", Journal of Korean Institute of Information Technology, vol. 9, issue 4, pp. 187-194, Apr. 2011.
|
8 |
L. J. Karam, I. AlKamal, A. Gatherer, G. A. Frantz, D. V. Anderson, B. L. Evans, "Trends in Multi-core DSP Platforms," IEEE Signal Processing Magazine, pp. 1- 10, Nov. 2009
|
9 |
이종복, "멀티코어 프로세서의 명령어 자취형 모의실험에 대한 연구," 한국인터넷방송통신학회, 제12권, 제3호, pp. 9-13, 2012년 6월.
과학기술학회마을
DOI
ScienceOn
|
10 |
P. K. Dubey, G. B. Adams III, and M. J. Flynn, "Instruction Window Size Trade-Offs and Characterization of Program Parallelism," IEEE Transactions on Computers, vol. 43, pp. 431-442, Apr. 1994.
DOI
ScienceOn
|
11 |
S. W. Keckler, K. Olukotun, and H. P. Hofsee, "Multicore Processors and Systems," Springer. 2009.
|
12 |
T. Ungerer, B. Robic, and J. Silk, "Multithreaded Processors," The Computer Journal, Vol. 45, No. 3, 2002.
|