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http://dx.doi.org/10.7236/JIIBC.2013.13.4.171

Performance Study of Multicore Digital Signal Processor Architectures  

Lee, Jongbok (Dept. of ICs Engineering, Hansung University)
Publication Information
The Journal of the Institute of Internet, Broadcasting and Communication / v.13, no.4, 2013 , pp. 171-177 More about this Journal
Abstract
Due to the demand for high speed 3D graphic rendering, video file format conversion, compression, encryption and decryption technologies, the importance of digital signal processor system is growing rapidly. In order to satisfy the real-time constraints, high performance digital signal processor is required. Therefore, as in general purpose computer systems, digital signal processor should be designed as multicore architecture as well. Using UTDSP benchmarks as input, the trace-driven simulation has been performed and analyzed for the 2 to 16-core digital signal processor architectures with the cores from simple RISC to in-order and out-of-order superscalar processors for the various window sizes, extensively.
Keywords
digital signal processor; multicore processor;
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Times Cited By KSCI : 2  (Citation Analysis)
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1 http://www.eecg.toronto.edu/-corinna/DSP/infrastr ucture/UTDSP.html
2 G. S. Sohi, S. E. Breach, and T. N. Vijaykumar, "Multiscalar Processors," Proceedings of the 22nd annual international symposium on Computer architecture, pp. 414-425, May 1995.
3 T-Y. Yeh and Y. N. Patt, "Alternative Implementations of Two-Level Adaptive Branch Prediction," in Proceedings of the 19th International Symposium on Computer Architecture, pp. 124-134, May 1992.
4 A. Rico, A. Duran. F. Cabarcas, Y. Etsion, A. Ramirex, and M. Valero, "Trace-driven Simulation of Multithreaded Applications," ISPASS, Apr. 2011.
5 T. Austin, E. Larson, and D. Ernest, "SimpleScalar : An Infrastructure for Computer System Modeling," Computer, vol. 35, no. 2, pp. 59-67, Feb. 2002.   DOI   ScienceOn
6 I. Jeon, S. Kang, H. Yang, "Development of Security Quality Evaluate Basis and Measurement of Intrusion Prevention System," Journal of the Korea Academia-Industrial cooperation Society, v.11, no. 4, Apr. 2010.   과학기술학회마을   DOI   ScienceOn
7 D. K. Lee, J. H. Kwon, "Social Search Algorithm considering Recent Interests of User", Journal of Korean Institute of Information Technology, vol. 9, issue 4, pp. 187-194, Apr. 2011.
8 L. J. Karam, I. AlKamal, A. Gatherer, G. A. Frantz, D. V. Anderson, B. L. Evans, "Trends in Multi-core DSP Platforms," IEEE Signal Processing Magazine, pp. 1- 10, Nov. 2009
9 이종복, "멀티코어 프로세서의 명령어 자취형 모의실험에 대한 연구," 한국인터넷방송통신학회, 제12권, 제3호, pp. 9-13, 2012년 6월.   과학기술학회마을   DOI   ScienceOn
10 P. K. Dubey, G. B. Adams III, and M. J. Flynn, "Instruction Window Size Trade-Offs and Characterization of Program Parallelism," IEEE Transactions on Computers, vol. 43, pp. 431-442, Apr. 1994.   DOI   ScienceOn
11 S. W. Keckler, K. Olukotun, and H. P. Hofsee, "Multicore Processors and Systems," Springer. 2009.
12 T. Ungerer, B. Robic, and J. Silk, "Multithreaded Processors," The Computer Journal, Vol. 45, No. 3, 2002.