Browse > Article

A Study of the Threshold Voltage of a Symmetric Double Gate Type MOSFET  

Lee, Jeong-Ihll (경민대학 정보통신과)
Shin, Jin-Seob (경민대학 정보통신과)
Publication Information
The Journal of the Institute of Internet, Broadcasting and Communication / v.10, no.6, 2010 , pp. 243-249 More about this Journal
Abstract
In this thesis, in order to a equivalent circuit-analytical study for a symmetric double gate type MOSFET, we slove analytically the 2D Poisson's equation in a a silicon body. To solve the threshold voltage in a symmetric double gate type MOSFET from the derived expression for the surface potential which the two-dimensional potential distribution of a symmetric double gate type MOSFET is assumed approximately. This thesis can use short and long channel in a silicon body we introduce a new the threshold voltage model in a symmetric double gate type MOSFET and measure it the distance about the range of channel length up to 0.1 [${\mu}m$].
Keywords
SOI(Silicon On Insulator); Double Gate MOSFET; Threshold Voltage; Short Channel Effect;
Citations & Related Records
연도 인용수 순위
  • Reference
1 S. P. Sinha, A. Zaleski, D. E. Ioannou, "Investigation of carrier generation in fully depleted enhancement and accumulation mode SOI MOSFET's," IEEE Trans. Electron Devices, vol. 42, no. 12, pp. 2413 - 2416, Dec. 1994.
2 Ni. Pei, Weiping A. V. Kammula, B. A. Minch, E. C. Kan, "A physical compact model of DG MOSFET for mixed-signal circuit applications-part I : model description," IEEE Trans. Electron Devices, vol. 51, no. 12, pp. 2135 - 2143, Dec. 2004.
3 Weimin Zhang, Fossum, J. G, Mathew, L, Yang Du, "Physical insights regarding design and performance of independent-gate FinFETs," IEEE Trans. Electron Devices, vol. 52, no. 10, pp. 2198 - 2206, Oct. 2005.   DOI   ScienceOn
4 K. K. Young, "Short-channel effect in fully depleted SOI MOSFETs," IEEE Trans. Electron Devices, vol. 36, no. 2, pp. 399 - 402, Feb. 1989.   DOI   ScienceOn
5 Y. Omura, "A simple model for short-channel effects of a buried-channel MOSFET on the buried insulator," IEEE Trans. Electron Devices, vol. 29, no. 11, pp. 1749-1755, Nov. 1982.   DOI
6 A. Dasgupta, S. K. Lahiri, "A two-dimensional analytical model of threshold voltages of short-channel MOSFETs with Gaussian-doped channels," IEEE Trans. Electron Devices, vol. 35, no. 3, pp. 390-392, Mar. 1988.   DOI   ScienceOn
7 Yu Tian, Ru Huang, Xing Zhang, Yangyuan Wang, "A novel nanoscaled device concept: quasi-SOI MOSFET to eliminate the potential weaknesses of UTB SOI MOSFET," IEEE Trans. Electron Devices, vol. 52, no. 4, pp. 561 - 568, Apr. 2005.   DOI   ScienceOn
8 T. J. Cunningham, R. C. Gee, E. R. Fossum, S. M. Baier, "Deep cryogenic noise and electrical characterization of the complementary heterojunction field-effect transistor (CHFET)," IEEE Trans. Electron Device Letters, vol. 41, no. 6, pp. 888-894, Nov. 1994.   DOI   ScienceOn
9 K. W. Terrill, C. U. Hu, P. K. Ko, "An Analytical Model for the Channel Electric Field in MOSFET's with Graded-Drain Structures," IEEE Trans. Electron Device Letters, vol. 5, no. 11, pp. 440-442, Nov. 1984.   DOI
10 Ge. Lixin, J. G. Fossum, "Analytical modeling of quantization and volume inversion in thin Si-film DG MOSFETs," IEEE Trans. Electron Devices, vol. 49, no. 2, pp. 287 - 294, Feb. 2002.   DOI   ScienceOn
11 K. N. Ratnakumer, J. D. Meindle, "Short-channel MOST threshold Voltage Model," IEEE J. of Solid-state Circuits, vol. SC-17, pp. 937-947, Oct. 1982.