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http://dx.doi.org/10.14372/IEMEK.2011.6.4.6

A Study on Optimization of Hardware Complexity of a FFT Processor for IEEE 802.11n WLAN  

Choi, Rakhun (서강대학교 전자공학과)
Park, Jungjun (서강대학교 전자공학과)
Lim, Taemin (서강대학교 전자공학과)
Lee, Jinyong (서강대학교 전자공학과)
Kim, Younglok (서강대학교 전자공학과)
Publication Information
IEMEK Journal of Embedded Systems and Applications / v.6, no.4, 2011 , pp. 243-248 More about this Journal
Abstract
A FFT/IFFT processor is the key component for orthogonal frequency division multiplexing (OFDM) systems based IEEE 802.11n wireless local area network (WLAN). There exists many radix algorithms according to the structure of butterfly as FFT sub-module, each has the pros and cons on hardware complexity. Here, mixed radix algorithms for 64 and 128 FFT/IFFT processors are proposed, which reduce hardware complexity by using mixture of radix-23 and radix-4 algorithms. The proposed algorithm finish calculation within 3.2${\mu}s$ in order to meet IEEE 802.11n standard requirements and it has less hardware complexity compared with conventional algorithms.
Keywords
FFT; Mixed radix; OFDM; IEEE 802.11n; WLAN;
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