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http://dx.doi.org/10.9717/kmms.2011.14.3.368

FPGA Design of a SURF-based Feature Extractor  

Ryu, Jae-Kyung (광운대학교 정자통신공학과)
Lee, Su-Hyun (광운대학교 정자통신공학과)
Jeong, Yong-Jin (광운대학교 정자통신공학과)
Publication Information
Abstract
This paper explains the hardware structure of SURF(Speeded Up Robust Feature) based feature point extractor and its FPGA verification result. SURF algorithm produces novel scale- and rotation-invariant feature point and descriptor which can be used for object recognition, creation of panorama image, 3D Image restoration. But the feature point extraction processing takes approximately 7,200msec for VGA-resolution in embedded environment using ARM11(667Mhz) processor and 128Mbytes DDR memory, hence its real-time operation is not guaranteed. We analyzed integral image memory access pattern which is a key component of SURF algorithm to reduce memory access and memory usage to operate in c real-time. We assure feature extraction that using a Vertex-5 FPGA gives 60frame/sec of VGA image at 100Mhz.
Keywords
SURF; Feature Extraction; Field Programmable gate Aray(FPGA); Integral Image;
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Times Cited By KSCI : 1  (Citation Analysis)
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