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http://dx.doi.org/10.6117/kmeps.2018.25.2.049

Effect of Si grinding on electrical properties of sputtered tin oxide thin films  

Cho, Seungbum (Graduate School of Nano-IT Design Convergence, Seoul National University of Science and Technology)
Kim, Sarah Eunkyung (Graduate School of Nano-IT Design Convergence, Seoul National University of Science and Technology)
Publication Information
Journal of the Microelectronics and Packaging Society / v.25, no.2, 2018 , pp. 49-53 More about this Journal
Abstract
Recently, technologies for integrating various devices such as a flexible device, a transparent device, and a MEMS device have been developed. The key processes of heterogeneous device manufacturing technology are chip or wafer-level bonding process, substrate grinding process, and thin substrate handling process. In this study, the effect of Si substrate grinding process on the electrical properties of tin oxide thin films applied as transparent thin film transistor or flexible electrode material was investigated. As the Si substrate thickness became thinner, the Si d-spacing decreased and strains occurred in the Si lattice. Also, as the Si substrate thickness became thinner, the electric conductivity of tin oxide thin film decreased due to the lower carrier concentration. In the case of the thinner tin oxide thin film, the electrical conductivity was lower than that of the thicker tin oxide thin film and did not change much by the thickness of Si substrate.
Keywords
tin oxide; Si grinding; lattice strain; stacked thin film;
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Times Cited By KSCI : 1  (Citation Analysis)
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