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C. Kim, S. Cho, S. Kim, and S. E. Kim, "Study of the effect of vacuum annealing on sputtered SnxOy thin films by SnO/Sn composite target", J. Microelectron. Packag. Soc., 24(2), 43 (2017).
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L. Filipovic, and S. Selberherr, "Performance and Stress Analysis of Metal Oxide Films for CMOS-Integrated Gas Sensors", Sensors, 15, 7206 (2015).
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J. Um, and S. E. Kim, "Homo-Junction pn Diode Using p-Type SnO and n-Type Thin Films", ECS Solid State Letters, 3(8), 94 (2014).
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B. G. Lewis, and D.C. Paine, "Applications and Processing of Transparent Conducting Oxides", MRS Bulletin, 25(8), 22(2000).
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S. E. Kim, and M. Oliver, "Structural, Electrical, and Optical Properties of Reactively Sputtered ", Thin Films, Met. Mater. Int., 16(3), 441 (2010).
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W. Guo, L. Fu,Y. Zhang, K. Zhang, L. Y. Liang, Z. M. Liu, and H. T. Cao, "Microstructure, Optical, and Electrical Properties of p-type SnO Thin Films", Appl. Phys. Lett., 96, 042113 (2010).
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L. Madler, T. Sahm, A. Gurlo, J. D. Grunwaldt, N. Barsan, U. Weimar, and S. Pratsinis,, "Sensing low concentrations of CO using flame-spray-made nanoparticles", J. Nanoparticle Res., 8, 783 (2008).
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C. Kim, S. Cho, S. Kim, and S. E. Kim, "Study of the effect of vacuum annealing on sputtered SnxOy thin films by SnO/Sn composite target", J. Microelectron. Packag. Soc., 24(2), 43 (2017).
DOI
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M. K. Choi, and E. Kim, "Effect of Si wafer ultra-thinning on the silicon surface for 3D integration", J. Microelectron. Packag. Soc., 15(2), 133 (2008).
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K. Maeng, Y. Kim, S. Kang, S. Kim, and S. E. Kim, "Stress analysis of stacked Si wafer in 3D WLP", Current Applied Physics, 11, S119 (2011).
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C. Kim, S. Cho, S. Kim, and S. E. Kim, "Comparative Analysis of SnOx Thin Films Deposited by RF Reactive Sputtering with Different SnO/Sn Target Compositions", ECS Journal of Solid State Science and Technology, 6(12), P765(2017).
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R. S. List, C. Webb, and S. E. Kim. "3D Wafer stacking technology", Proc. Adv. Metall. Conf. 29 (2002).
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J. Azémar, and P. Garrou, "Fan out packaging: what can explain such a great potential?", Chip Scale Review, 19(3), 5 (2015).
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A. Alderman, L. Burgyan, B. Narveson, and E. Parker, "3D embedded packaging technology", IEEE Power Electronic Magazine, 2(4), 30 (2015).
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