Browse > Article

A Mapping Table Caching Scheme for NAND Flash-based Mobile Storage Devices  

Yang, Soo-Hyeon (명지대학교 컴퓨터공학과)
Ryu, Yeon-Seung (명지대학교 컴퓨터공학과)
Publication Information
The Journal of Society for e-Business Studies / v.15, no.4, 2010 , pp. 21-31 More about this Journal
Abstract
Recently e-business such as online financial trade and online shopping using mobile computes are widely spread. Most of mobile computers use NAND flash memory-based storage devices for storing data. Flash memory storage devices use a software called flash translation layer to translate logical address from a file system to physical address of flash memory by using mapping tables. The legacy FTLs have a problem that they must maintain very large mapping tables in the RAM. In order to address this issues, in this paper, we proposed a new caching scheme of mapping tables. We showed through the trace-driven simulations that the proposed caching scheme reduces the space overhead dramatically but does not increase the time overhead. In the case of online transaction workload in e-business environment, in particular, the proposed scheme manifests better performance in reducing the space overhead.
Keywords
Mobile storage device; Flash memory; Mapping table; Caching;
Citations & Related Records
연도 인용수 순위
  • Reference
1 S. Lee, D. Park, T. Chung, D. Lee, S. Park, and H. Song, "A Log Bufferbased Flash Translation Layer using Fully-associative Sector Translation," ACM Transaction on Embedded Computing Systems, Vol. 6, No. 3, Jul. 2007.
2 S. Lee, D. Shin, Y. Kim, and J. Kim, "LAST : Locality-aware Sector Translation for NAND Flash Memory-based Storage Systems," SIGOPS Operating Systems Review, Vol. 42, No. 6, Oct. 2008, pp. 36-42,   DOI   ScienceOn
3 Y. Ryu, "SAT : Switchable Address Translation for Flash Memory Storage," IEEE Computer Software and Applications Conference(COMPSAC), Jul. 2010.
4 J. Kim, J. Kim, S. Noh, S. Min, and Y. Cho, "A Space-efficient Flash Translation Layer for Compactflash Systems," IEEE Transactions on Consumer Electronics, Vol. 48, No. 2, May, 2002, pp. 366-375.   DOI   ScienceOn
5 J. Shin, Z. Xia, N. Xu, R. Gao, X. Cai, S. Maeng, and F. Hsu, "FTL Design Exploration in Reconfigurable Highperformance SSD for Server Applications," in Proc. ACM Conference on Supercomputing, 2009.
6 OLTP Trace from UMass Trace Repository. http://traces.cs.umass.edu/index.php/Storage/Storage.
7 Samsung Electronics, NAND Flash Memory Data Sheet, http://www.sams ungelectronics.com.
8 T. S. Chung, D. J. Park, S. Park, D. H. Lee, S. W. Lee, and H. J. Song, "A Survey of Flash Translation Layer," Journal of Systems Architecture, Vol. 55, No. 5-6, 2009.
9 C. Park, W. Cheon, J. Kang, K. Roh, W. Cho, and J. Kim, "A Reconfigurable FTL(flash translation layer) Architecture for NAND Flash-based Applications," ACM Transaction on Embedded Computing Systems, Vol. 7, No. 4, Jul. 2008.
10 A. Gupta, Y. Kim, and B. Urgaonkar, "DFTL : A Flash Translation Layer Employing Demand-based Selective Caching of Page-level Address Mapping," in Proc. International Conference on Architectural Support for Programming Languages and Operating Systems, 2009, pp. 229-240.
11 E. Gal and S. Toledo, "Algorithms and Data Structures for Flash Memories," ACM Computing Surveys, Vol. 37, No. 2, 2005.
12 Intel Corp. "Understanding the Flash Translation Layer(FTL) Specification," 1998.
13 J. Kang, H. Jo, J. Kim, and J. Lee, "A Superblock-based Flash Translation for NAND Flash Memory," in Proc. EMSOFT, 2006, pp. 161-170.