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http://dx.doi.org/10.13067/JKIECS.2015.10.6.749

Design and Implementation of a Systolic Architecture for Low Power Wireless Sensor Network  

Lee, Kyung-Hoon (전남대학교 전자컴퓨터공학과)
Lee, Hak-Jai (전남대학교 전자컴퓨터공학과)
Kim, Young-Min (전남대학교 전자컴퓨터공학과)
Publication Information
The Journal of the Korea institute of electronic communication sciences / v.10, no.6, 2015 , pp. 749-756 More about this Journal
Abstract
In this paper, we propose a unique systolic structure and communication algorithm that maintains a solid link between nodes using synchronous digital communication and enables low power communication. This system was designed by using CC2500 RF transceiver, CC2590 RF front end and C8051F330 low power microcontroller. The measurement of power consumption in the network link shows below $400{\mu}W$ in data transfer rate 320bps. The system constitutes the base unit of low power wireless network that was composed of each seven link nodes having eight sensor nodes. Results of the experiments show that link nodes using a 4Ah battery could operate over 3 years without replacement.
Keywords
Low Power; Wireless Sensor Network; Systolic Structure; TDMA;
Citations & Related Records
Times Cited By KSCI : 6  (Citation Analysis)
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