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http://dx.doi.org/10.13067/JKIECS.2013.8.1.099

Characteristics of 3-Dimensional Integration Circuit Device  

Park, Yong-Wook (남서울대학교 전자공학과)
Publication Information
The Journal of the Korea institute of electronic communication sciences / v.8, no.1, 2013 , pp. 99-104 More about this Journal
Abstract
As a demand for the portable device requiring smaller size and better performance is in hike, reducing the size of conventionally used planar 2 dimensional integration circuit(IC) cannot be a solution for the enhancement of the semiconductor integration circuit technology due to an increase in RC delay among interconnects. To address this problem, a new technology of 3 dimensional integration circuit (3D-IC) has been developing. In this study, three-dimensional integrated device was investigated due to improve of reducing the size, interconnection problem, high system performance and functionality.
Keywords
3-Dimensional; Integration Circuit(IC); Multilayer; Ground plane; Isolation;
Citations & Related Records
Times Cited By KSCI : 4  (Citation Analysis)
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1 J. W. Joyner, P. Z. Ha, and J. D. Meindl, "Global interconnect design in a thre edimensional system-on-a-chip", IEEE Trans. on VLSI Systems, vol. 12, 367, 2004.   DOI   ScienceOn
2 A. Rahman, S. Das, A. P. Chandrakasan, and R. Rei, "Wiring requirement and thre edimensional integration technology for field programmable gate arrays", IEEE Trans. on VLSI systems, 11, 44, 2003.   DOI   ScienceOn
3 L. Xue, C. C. Liu, H. S. Kim, S. Kim, and S. Tiwari, "Three-Dimensional Integration: Technology, Use, and Issues for Mixe d-Signal Applications", IEEE Trans. Electro n Devices, 50, 601, 2003.   DOI   ScienceOn
4 K. W. Guarini, C. F. Quate, and H. T. Soh, "Structure Suitable for a 3-V Operation Sector Erase Flash Memory", IEMD Tech. Dig., pp. 943-945. 2002.
5 K. Banerjee, S, J Souri, P. Kapur, and K. C Sar aswat, Proceedings of the IEEE, 89, 602, 2001.   DOI   ScienceOn
6 F. Niklaus, G. Stemme, J. Q. Lu, and R. J. Gutmann, "Adhesive wafer bonding", J. Micromech. Microeng., 11, 100, 2001.   DOI   ScienceOn
7 S. W. Seo, D. L. Geddes, and N. Jokerst, "3D Stacked Thin Film Photodetectors for Multispectral Applications", IEEE Photonics Technology Letters, 15, 578, 2003.   DOI   ScienceOn
8 P. Abele, J. Konle, D. Behammer, and K. B. Schad, "Wafer level integration of a 24 GHz and 34 GHz differential SiGe-MMIC oscillator with a loop antenna on a BCB membrane", IEEE MTT-S Digest, 1033, 2003.
9 고민호, 표승철, 박효달, "광대역 RF 전단부 구조에 관한 연구", 한국전자통신학회논문지, 4권, 3호, pp. 183-189, 2009.
10 최병상, "Pt 나노입자와 Hybrid Pt-SiO2 나노입자의 합성과 활용 및 입자박막 제어", 한국전자통신학회논문지, 4권, 4호, pp. 301-305, 2009.
11 이봉주, 신현용, "CVD로 제작된 SiO2 산화막의투습특성", 한국전자통신학회논문지, 5권, 1호, pp. 81-87, 2010.
12 채용웅, 윤광렬, "측면산화 프리크리닝의 최소화를 통한 DRAM의 데이터 유지시간 개선", 한국전자통신학회논문지,. 7권, 4호, pp. 833-837, 2012.
13 김주완, 구영덕, 배영철, "MEMS 소자에서의 비선형 현상", 한국전자통신학회논문지, 7권, 5호, pp. 1073-1078, 2012.