Browse > Article
http://dx.doi.org/10.13067/JKIECS.2013.8.11.1633

Extraction and Analysis of Dual Gate FET Noise Parameter for High Frequency Modeling  

Kim, Gue-Chol (목포해양대학교 전자공학과)
Publication Information
The Journal of the Korea institute of electronic communication sciences / v.8, no.11, 2013 , pp. 1633-1640 More about this Journal
Abstract
In this paper, noise parameters for high frequency modeling of dual-gate FET are extracted and analyzed. To extract thermal noise parameter of dual gate, noise characteristics are measured by changing input impedance of noise source using Tuner, and the influence of pad parasitic elements are subtracted using open and short dummy structure. Measured results indicated that the dual-gate FET is improved the noise figure by 0.2dB compared with conventional cascode structure FET at 5GHz, and it confirmed that the noise figure has dropped due to reduction of capacitances between the drain and source, gate and drain by simulation and analysis of small-signal parameters.
Keywords
Low noise; MOSFET; Small-signal Model; CMOS;
Citations & Related Records
Times Cited By KSCI : 7  (Citation Analysis)
연도 인용수 순위
1 B. Razavi, RF Microelectronics, Prentice-Hall, Englewood Cliffs, NJ, pp. 225-226, 1998.
2 C. C. Enz and Y. Cheng, "MOS Transistor Modeling for RF IC", IEEE J. Solid-State Circuits, Vol. 35, No. 2, pp. 186-201, 2000.   DOI   ScienceOn
3 G. Kim, Y. Shimizu, B. Murakami, M. Goto, K. Ueda, T. Kihara, T. Matsuoka, and K. Taniguchi: "Small-Signal and Noise Model of FD-SOI MOS Devices for Low Noise Amplifier", Jpn, J. Appl, Phys, Vol. 45, No. 9A, pp. 6872-6877, 2006.   DOI   ScienceOn
4 A. Abidi, "High-Frequency Noise Measurements on FET's with Small Dimensions", IEEE Trans. Electron Devices. Vol. 33, pp. 1801-1805, 1986.   DOI   ScienceOn
5 G.Huang, T.Kim, S.Kim and B.Kim, "Post- Linearization Technique of CMOS Cascode Low Noise Amplifier Using Dual Common Gate FETs", The Institute of Electronics Engineers of Korea, Vol. 44, No. 7, pp. 41-46, 2007.   과학기술학회마을
6 R.funimoto, K.Kojima and S.Otaka "A 7-GHz 1.8dB NF CMOS Low-Noise Amplifier", IEEE Journal of Solid State Circuits, Vol. 37, No. 7, pp. 852-856, 2002.   DOI   ScienceOn
7 T.S.Arun Samuel, N.B.Balamurugan, S.Sibitha, R.Saranya, D.Vanisri "Analytical Modeling and Simulation of Dual Material Gate Tunnel field Effect Transistors", Journal of Electrical Engineering & Technology, Vol. 8, No. 6, pp. 1481-1486, 2013.   DOI   ScienceOn
8 M.Goe, "Design and Fabrication of wideband low-noise amplification stage for COMINT", The Journal of The Korea Institute of Electronic Communication Sciences, Vol. 7, No. 2, pp. 221-226, 2012.   과학기술학회마을
9 J.Lim, T.Kim, J.Park, Y.Rhee, "Implementation of Ka-band Low Noise Block Converter For Satellite TVRO", The Journal of The Korea Institute of Electronic Communication Sciences, Vol. 3, No. 2, pp. 93-100, 2008.   과학기술학회마을
10 M.Go, S.Pyo, H.Park "A Study on the amplification Block for Integrated Antenna Module Applicable to Vehicles ", The Journal of The Korea Institute of Electronic Communication Sciences, Vol. 4, No. 2, pp. 87-92, 2009.   과학기술학회마을
11 G.Kim, "Accurate parameter extraction method for FD-SOI MOSFETs RF small-signal model including non-quasi-static effects", The Journal of The Korea Institute of Maritime information & Communication Sciences, Vol. 11, No. 10, pp. 1910-1915, 2007.   과학기술학회마을
12 G.Kim, "Analysis and extraction method of noise parameters for short channel MOSFET thermal noise modeling", The Journal of The Korea Institute of Maritime Information & Communication Sciences, Vol. 13, No. 12, pp. 2655-2661, 2009.   과학기술학회마을
13 G. Knoblinger, "RF-Noise of Deep- Submicron MOSFETs Extraction and Modeling", Proc of the ESSDERC, pp. 331-334, 2001.