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http://dx.doi.org/10.6113/TKPE.2017.22.5.431

An Asymmetric Half-Bridge Converter with Reduced Transformer Offset Current in Wide Input Voltage Range  

Han, Jung-Kyu (School of Electrical Engineering, KAIST)
Kim, Jong-Woo (Future Energy Electronics Center, Virginia Tech)
Moon, Gun-Woo (School of Electrical Engineering, KAIST)
Publication Information
The Transactions of the Korean Institute of Power Electronics / v.22, no.5, 2017 , pp. 431-439 More about this Journal
Abstract
An asymmetric half-bridge is one of the most promising topology in low-power application because of its small number of components and inherent zero-voltage switching capability. However, when it is designed taking into a hold-up time, it has large transformer offset current and small transformer turns-ratio, which severely decreases the total efficiency of s converter. In this paper, a new boost-integrated asymmetric half-bridge converter is proposed to solve these problems. The integrated boost converter compensates the hold-up time, thus facilitating optimal design in nominal state. As a result, the proposed converter can achieve high efficiency in nominal state. To verify the effectiveness of the proposed converter, an experiment is conducted using a 250-400 V input and 45 V/3.3 A output prototype.
Keywords
DC/DC converter; Asymmetric half-bridge converter; Transformer offset current;
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