A Method of PLL(Phase-Locked Loop) using FFT
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Ryu, Kang-Ryul
(한국전기연구원)
Lee, Jong-Pil (한국전기연구원) Kim, Tae-Jin (한국전기연구원) Yoo, Dong-Wook (한국전기연구원) Song, Eui-Ho (창원대 제어계측공학과) Min, Byung-Duk (한국전기연구원) |
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3 | J.P. Lee, B.D Min, J.J Kim, K.R R, T.J Kim, D.W Yoo, E.H Song, J.Y Yoo, "A New Topology for Photovoltaic 4 Series DC/DC Converter with High Efficiency Under Wide Load Range", International Conference on Power Electronics, pp. 257-260, 2007, Oct. 22-26 |
4 | 정세교, 이대식, "PLL 기법을 이용한 단상 PWM 인버터의 정상상태 성능개선", 전력전자학회 논문지, 제9권, 제4호, pp. 356-363, 2004. 8 |
5 | L.N Arruda, B.J. Cardoso Filho, S.M. Silva, S.R. Silva, A.S.A.C. Diniz, "Wide bandwidth single and three-phase PLL structures for grid-tied PV systems", Photovoltaic Specialists Conference, 2000. Conference Record of the Twenty-Eighth IEEE, pp. 1660-1663, 2000, Sept. 15-22 |
6 | S.-K. Chung, "Phase-locked loop for grid-connected three-phase power conversionsystem", Electric Power Applications. IEEE Proceedings, Vol. 147, pp. 213-219, 2000, May |
7 | 김용균, 최종우, 김흥근, "디지털 PLL 제어의 특성 분석", 전력전자학회, 2003 춘계전력전자학술대회 논문집(2), pp. 548-553, 2003 |
8 | IEEE Std 929-2000 IEEE Recommended Practice for Utility Interface of Photovoltaic (PV) Systems |
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