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http://dx.doi.org/10.5207/JIEIE.2011.25.11.098

Design of Inverse E Class Frequency Multiplier with High Efficiency  

Roh, Hee-Jung (김포대학 유비쿼터스IT과)
Cho, Jeong-Hwan (김포대학 IT학부)
Publication Information
Journal of the Korean Institute of Illuminating and Electrical Installation Engineers / v.25, no.11, 2011 , pp. 98-102 More about this Journal
Abstract
This paper describes inverse E class frequency multiplier which is lower inductance and peak switching voltage than E class frequency multiplier. The frequency multiplier is designed to generate 5.8[GHz] frequency by doubling the input frequency 2.9[GHz]. The peak switching voltage of designed inverse E class frequency multiplier with 11[V] is lower 4[V] than that of E class frequency multiplier with 15[V]. The inverse E class frequency multiplier has a conversion gain 6[dB] at output power 21[dBm] and maximum 35[%] power efficiency.
Keywords
Frequency Multiplier; High Efficiency; Inverse E Class Multiplier;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
연도 인용수 순위
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