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http://dx.doi.org/10.5515/KJKIEES.2013.24.6.595

Millimeter-Wave CMOS On-Chip Dipole Antenna Design Optimization  

Choi, GeunRyoung (Department of IT Convergence, Korea University)
Choi, Seung-Ho (Department of Electrical Engineering, Korea University)
Lee, Kook Joo (Department of Electrical Engineering, Korea University)
Kim, Moonil (Department of Electrical Engineering, Korea University)
Kim, Dowon (Digital Media & Communications R&D Center, Samsung Electronics Co., Ltd.)
Jung, Dong Yun (Digital Media & Communications R&D Center, Samsung Electronics Co., Ltd.)
Publication Information
The Journal of Korean Institute of Electromagnetic Engineering and Science / v.24, no.6, 2013 , pp. 595-601 More about this Journal
Abstract
This paper presents an optimized design of a millimeter-wave on-chip dipole antenna using CMOS process. The serious flaw of the antenna using CMOS process is low radiation efficiency because of high permittivity and conductivity. To overcome the weakness, we need to widen radiation area in air and optimize distance between an antenna and a reflector. The radiation efficiency and bandwidth of the designed antenna are respectively 16.5 % and 22.3 % at 80 GHz. Systematic methods are attempt to analyze an effect on the antenna radiation efficiency. To widen radiation area in air, substrate cut angle and distance between the antenna and chip edge are adjusted. In addition, to optimize distance between an antenna and reflector, substrate thickness and distance between the antenna and a circuit ground plane are adjusted.
Keywords
CMOS; Millimeter Wave; On-Chip Antenna; Dipole;
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