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http://dx.doi.org/10.5515/KJKIEES.2013.24.3.278

A 100~110 GHz LNA and A Coupler Using Standard 65 n CMOS Process  

Kim, Jihoon (School of Electrical Engineering and Computer Science and INMC, Seoul National University)
Park, Hongjong (School of Electrical Engineering and Computer Science and INMC, Seoul National University)
Kwon, Youngwoo (School of Electrical Engineering and Computer Science and INMC, Seoul National University)
Publication Information
The Journal of Korean Institute of Electromagnetic Engineering and Science / v.24, no.3, 2013 , pp. 278-285 More about this Journal
Abstract
In this paper, a 100~110 GHz LNA and A coupler using standard 65 n CMOS process is presented. The LNA consists of three common source FET stages. A few layout types are considered to get high gain characteristic of unit common source cell. Also, optimized performance to achieve low noise characteristic and enough gain. Coupler is composed of broadside coupler using multimetal in CMOS fabrication. In the coupler, the metal strip to meet density rule is used, and the coupler is designed with consideration of the metal strip to function properly. Gain of fabricated LNA is 5.64 dB at 100 GHz and 6.39 dB at 110 GHz. Bandwidth is over 10 % and noise figure is 11.66 dB at 100 GHz. Fabricated coupler has shown insertion loss of 2~3 dB at 100~110 GHz band. Magnitude mismatch of coupler is below 1 dB and phase mismatch of coupler is below $5^{\circ}$.
Keywords
LNA; Coupler; W-Band; CMOS; MMIC; Receiver;
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