1 |
A 5 to 10 GHz Low Spurious Triple Tuned Type PLL Synthesizer Driven by Frequency Converted DDS Unit
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[
K. Tajima;Y. Imai;Y. Kanagawa;K. Itoh
] /
IEEE MTTS International
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2 |
PLL Synthesizer with Multi-Programmable Divider and Multi-Phase Detector
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[
Y. Sumi;S. Obote;N. Kitai;H. Ishii;R. Furuhashi
] /
IEEE Transactions on Consumer Electronics
DOI
ScienceOn
|
3 |
Reduced Complexity Design for Triple-Tunable Frequency Synthesizer
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[
H. G. Ryu;Y. Y. Kim;H. M. Yu
] /
IEE Electronics Letters
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4 |
Fast Acquisition PLL Frequency Synthesizer with Improved N-Stage Cycle Swallower
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[
T. Saba;D. K. Park;S. Mori
] /
IEEE ISSSTA '94
|
5 |
/
[
B-G. Goldberg
] /
Digital Techniques in Frequency Synthesis
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6 |
Fast Frequency Synthesis by PLL Using a Continuous Phase Divider
/
[
D. Wulich
] /
Proceedings of the IEEE
DOI
ScienceOn
|
7 |
Design of DDFS-driven PLL Frequency Synthesizer with Reduced Complexity
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[
H. G. Ryu;Y. Y. Kim;H. M. Yu;S. B. Ryu
] /
IEEE Transactions on Consumer Electronics
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