Applications of Triple Controlled Type DDFS-driven PLL Frequency Synthesizer to Broadband Wireless Systems |
Heung-Gyoon Ryu
(Dept. of Electronic Engineering and Research Institute of Computer, Information & Communication, Chungbuk National University)
Byeong-Rok An (Dept. of Electronic Engineering and Research Institute of Computer, Information & Communication, Chungbuk National University) |
1 |
A 5 to 10 GHz Low Spurious Triple Tuned Type PLL Synthesizer Driven by Frequency Converted DDS Unit
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2 |
PLL Synthesizer with Multi-Programmable Divider and Multi-Phase Detector
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DOI ScienceOn |
3 |
Reduced Complexity Design for Triple-Tunable Frequency Synthesizer
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4 |
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5 |
Fast Acquisition PLL Frequency Synthesizer with Improved N-Stage Cycle Swallower
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6 |
Design of DDFS-driven PLL Frequency Synthesizer with Reduced Complexity
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7 |
Fast Frequency Synthesis by PLL Using a Continuous Phase Divider
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DOI ScienceOn |