| 1 | Jun So Pak, Jonghyun Cho, Joohee Kim, Junho Lee, Hyungdong Lee, Kunwoo Park, and Joungho Kim, "Slow wave and dielectric quasi-tern modes of metal-insulator-semiconductor structure through silicon via in signal propagation and power delivery in 3D chip package", in Proceedings of the 60th Electronic Componentsand Technology Conference 2010(ECTC2010), Jun. 2010. |
| 2 | Jun So Pak, Jonghyun Cho, Joohee Kim, Junho Lee, Hyungdong Lee, Kunwoo Park, and Joungho Kim, "On-chip PDN design effects on 3D stacked on-chip PDN impedance based on TSV interconnection", in Proceedings of the 2010 Electrical Design Advanced Packaging & Systems, Singapore, Dec. 2010. |
| 3 | "3DIC & TSV Report", Yole Development, Nov 2007. |
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