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http://dx.doi.org/10.4313/JKEM.2014.27.3.137

Characterization of Backside Passivation Process for Through Silicon via Wafer  

Kang, Dong Hyun (Department of Electronic Engineering, Myongji University)
Gu, Jung Mo (Department of Electronic Engineering, Myongji University)
Ko, Young-Don (Department of Mechanical and Industrial Engineering, University of Toronto)
Hong, Sang Jeen (Department of Electronic Engineering, Myongji University)
Publication Information
Journal of the Korean Institute of Electrical and Electronic Material Engineers / v.27, no.3, 2014 , pp. 137-140 More about this Journal
Abstract
With the recent advent of through silicon via (TSV) technology, wafer level-TSV interconnection become feasible in high volume manufacturing. To increase the manufacturing productivity, it is required to develop equipment for backside passivation layer deposition for TSV wafer bonding process with high deposition rate and low film stress. In this research, we investigated the relationship between process parameters and the induced wafer stress of PECVD silicon nitride film on 300 mm wafers employing statistical and artificial intelligence modeling. We found that the film stress increases with increased RF power, but the pressure has inversely proportional to the stress. It is also observed that no significant stress change is observed when the gas flow rate is low.
Keywords
Through silicon via; Modeling; PECVD; TSV backside passivation; RSM;
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