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http://dx.doi.org/10.4313/JKEM.2005.18.7.667

Electrical Characteristics of LOMOST under Various Overlap Lengths between Gate and Drift Region  

Ha, Jong-Bong (충북대학교 반도체공학과)
Na, Kee-Yeol (충북대학교 반도체공학과)
Cho, Kyoung-Rok (충북대학교 반도체공학과)
Kim, Yeong-Seuk (충북대학교 반도체공학과)
Publication Information
Journal of the Korean Institute of Electrical and Electronic Material Engineers / v.18, no.7, 2005 , pp. 667-674 More about this Journal
Abstract
In this paper the gate overlap length of the LDMOST is optimized for obtaining longer device lifetime. The LDMOSI device with drift region is fabricated using the $0.25\;{\mu}m$ CMOS Process. The gate overlap lengths on drift region are $0.1\;{\mu}m,\;0.4\;{\mu}m\;0.8\;{\mu}m\;and\;1.1\;{\mu}m$, respectively. The breakdown voltages, on-resistances and hot-carrier degradations of the fabricated LDMOST devices are characterized. The LDMOST device with gate overlap length of $0.4\;{\mu}m$ showed the longest on-resistance lifetime, 0.02 years and breakdown voltage of 22 V and on-resistance of $23\;m\Omega{\cdot}mm^2$.
Keywords
LDMOST; Reliability; Breakdown voltage; On-resistance;
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