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http://dx.doi.org/10.7471/ikeee.2021.25.1.10

Color Correction with Optimized Hardware Implementation of CIE1931 Color Coordinate System Transformation  

Kim, Dae-Woon (Dept. of Electronic Engineering, Dong-A University)
Kang, Bong-Soon (Dept. of Electronic Engineering, Dong-A University)
Publication Information
Journal of IKEEE / v.25, no.1, 2021 , pp. 10-14 More about this Journal
Abstract
This paper presents a hardware that improves the complexity of the CIE1931 color coordinate algorithm operation. The conventional algorithm has disadvantage of growing hardware due to 4-Split Multiply operations used to calculate large bits in the computation process. But the proposed algorithm pre-calculates the defined R2X, X2R Matrix operations of the conventional algorithm and makes them a matrix. By applying the matrix to the images and improving the color, it is possible to reduce the amount of computation and hardware size. By comparing the results of Xilinx synthesis of hardware designed with Verilog, we can check the performance for real-time processing in 4K environments with reduced hardware resources. Furthermore, this paper validates the hardware mount behavior by presenting the execution results of the FPGA board.
Keywords
CIE1931; Color Gamut; Verilog-HDL; hardware implementation; FPGA;
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