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http://dx.doi.org/10.7471/ikeee.2016.20.3.209

FPGA Design of SVM Classifier for Real Time Image Processing  

Na, Won-Seob (Dept. of Electronics and Communications Engineering, Kwangwoon University)
Han, Sung-Woo (Dept. of Electronics and Communications Engineering, Kwangwoon University)
Jeong, Yong-Jin (Dept. of Electronics and Communications Engineering, Kwangwoon University)
Publication Information
Journal of IKEEE / v.20, no.3, 2016 , pp. 209-219 More about this Journal
Abstract
SVM is a machine learning method used for image processing. It is well known for its high classification performance. We have to perform multiple MAC operations in order to use SVM for image classification. However, if the resolution of the target image or the number of classification cases increases, the execution time of SVM also increases, which makes it difficult to be performed in real-time applications. In this paper, we propose an hardware architecture which enables real-time applications using SVM classification. We used parallel architecture to simultaneously calculate MAC operations, and also designed the system for several feature extractors for compatibility. RBF kernel was used for hardware implemenation, and the exponent calculation formular included in the kernel was modified to enable fixed point modelling. Experimental results for the system, when implemented in Xilinx ZC-706 evaluation board, show that it can process 60.46 fps for $1360{\times}800$ resolution at 100MHz clock frequency.
Keywords
Machine Learning; SVM; Image Processing; Real Time Processing; Parallel Processing;
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Times Cited By KSCI : 1  (Citation Analysis)
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