Design of eFuse OTP IP for Illumination Sensors Using Single Devices |
Souad, Echikh
(Dept. of Electronics Engineering, Changwon National University)
Jin, Hongzhou (Dept. of Electronics Engineering, Changwon National University) Kim, DoHoon (Dept. of Electronics Engineering, Changwon National University) Kwon, SoonWoo (Dept. of Electronics Engineering, Changwon National University) Ha, PanBong (Dept. of Electronics Engineering, Changwon National University) Kim, YoungHee (Dept. of Electronics Engineering, Changwon National University) |
1 | Jeong-Ho Kim, Du-Hwi Kim, Liyan Jin, PanBong Ha, and Young-Hee Kim, "Design of 1-Kb eFuse OTP Memory IP with Reliability Considered," Journal of Semiconductor Technology and Science, vol.11, no.2, pp.88-94. 2011. DOI: 10.5573/JSTS.2011.11.2.088 DOI |
2 | http://samsungsimulator.com. |
3 | H. Park et al., "Design of an 64-bit eFuse One-Time Programmable Memory IP Based on a Logic Process for Sensors," Proceedings of ICFICE 2015, pp.119-124, 2015. |
4 | J. H. Lee et al., "Design of a Asynchronous eFuse One-Time Programmable Memory IP of 1 Kilo Bits Based on a Logic Process," Journal of KIMICS, vol.13, no.7, pp.1371-1378, 2009. |
5 | Y. H. Kim et al., "Design of a 64-bit eFuse OTP Memory for Illumination Sensor Chips," Proceedings of KIIECT, pp.102-104, 2018. DOI: 10.6109/jkiice.2016.20.2.317 DOI |
6 | Y. H. Kim et al., "Design of eFuse OTP Memories of Various Sizes," Proceedings of KIIECT, pp.100-102, 2021. DOI: 10.6109/jkiice.2012.16.7.1455 DOI |
7 | Y. H. Kim, "Non-Volatile Memory Design," GS Intervision, 2016. |
8 | S. H. Kulkarni et al., "A 4kb metal-fuse OTPROM macro featuring a 2V programmable 1.37㎛2 1T1R bit cell in 32 ㎚ high-k metal-gate CMOS," IEEE Solid-State Circuits, vol.45, no.4, pp.863-868, 2010. DOI: 10.1109/JSSC.2010.2040115 DOI |
9 | Il-Jun Kim et al., "Design of an eFuse OTP IP for Illumination Sensor," Proceedings of KIIECT, pp.57-59, 2017. |
10 | D. H. Kim, J. H. Jang, L. Jin, J. H. Lee, P. B. Ha, and Y. H. Kim, "Design and Measurement of a 1-kBit eFuse One-Time Programmable Memory IP Based on a BCD Process," IEICE Trans. Electron., vol.E93-C, no.8, pp.1365-1370, 2010. DOI: 10.1587/transele.E93.C.1365 DOI |