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http://dx.doi.org/10.7471/ikeee.2021.25.4.770

The Analysis of Lateral Charge Migration at 3D-NAND Flash Memory by Tapering and Ferroelectric Polarization  

Lee, Jaewoo (Dept. of Electronics Engineering, Korea National University of Transportation)
Lee, Jongwon (Dept. of Electronics Engineering, Korea National University of Transportation)
Kang, Myounggon (Dept. of Electronics Engineering, Korea National University of Transportation)
Publication Information
Journal of IKEEE / v.25, no.4, 2021 , pp. 770-773 More about this Journal
Abstract
In this paper, the retention characteristics of 3D NAND flash memory applied with tapering and ferroelectric (HfO2) structure were analyzed after programming operation. Electrons trapped in nitride are affected by lateral charge migration over time. It was confirmed that more lateral charge migration occurred in the channel thickened by tapering of the trapped electrons. In addition, the Oxide-Nitride-Ferroelectric (ONF) structure has better lateral charge migration due to polarization, so the change in threshold voltage (Vth) is reduced compared to the Oxide-Nitride-Oxide (ONO) structure.
Keywords
3D NAND flash memory; taper angle; lateral charge migration; ferroelectric; threshold voltage;
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1 Y. Kim, et al. "Three-dimensional NAND flash architecture design based on single-crystalline stacked array," IEEE Transactions on Electron Devices, Vol.59, No.1, pp.35-45, 2011. DOI: 10.1109/TED.2011.2170841   DOI
2 Y. Kim, and M. Kang, "Down-coupling phenomenon of floating channel in 3D NAND flash memory," IEEE Electron Device Letters Vol.37, No.12, pp. 1566-1569, 2016. DOI: 10.1109/LED.2016.2619903   DOI
3 A. Goda, and P. Krishna. "Scaling directions for 2D and 3D NAND cells," 2012 International Electron Devices Meeting. IEEE, pp.2-1, 2012. DOI: 10.1109/IEDM.2012.6478961   DOI
4 M. Kang, et al. "Improving read disturb characteristics by using double common source line and dummy switch architecture in multi level cell nand flash memory with low power consumption," Japanese Journal of Applied Physics, Vol50m NO.4S, 2011. DOI: 10.7567/JJAP.50.04DD03   DOI
5 K.-T. Kim, et al. "The effects of taper -angle on the electrical characteristics of vertical NAND flash memories." IEEE Electron Device Letters, Vol.38, No.10, pp.1375-1378, 2017. DOI: 10.1109/LED.2017.2747631   DOI
6 A. Arreghini, and H. Jan Van, "Innovative schemes to improve reliability and density of horizontal and vertical channel 3D Flash," 2013 5th IEEE International Memory Workshop, pp.151-154, 2013. DOI: 10.1109/IMW.2013.6582121   DOI
7 J.-K. Jeong, et al. "Charge Migration Analysis of 3D SONOS NAND Flash Memory Using Test Pattern, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, Vol.20, No.2, pp.151-157, 2020.   DOI
8 M. Kang, and Y. Kim, "Natural local self-oosting effect in 3D NAND flash memory," IEEE Electron Device Letters, Vol.38, No.9, pp. 236-1239, 2017. DOI: 10.1109/LED.2017.2736541   DOI
9 K. Florent, et al. "Reliability study of ferroelectric Al: HfO 2 thin films for DRAM and NAND applications," IEEE Transactions on Electron Devices, Vol.64, No.10, pp.4091-4098, 2017. DOI: 10.1109/TED.2017.2742549   DOI
10 K.-T. Park, et al. "Three-dimensional 128 Gb MLC vertical NAND flash memory with 24-WL stacked layers and 50 MB/s high-speed programming," IEEE Journal of Solid-State Circuits, Vol.50, No.1, pp.204-213, 2014. DOI: 10.1109/JSSC.2014.2352293   DOI
11 K. Takeuchi, "Scaling challenges of NAND flash memory and hybrid memory system with storage class memory & NAND flash memory," Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, pp.1-6, 2013. DOI: 10.1109/CICC.2013.6658450   DOI