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http://dx.doi.org/10.7471/ikeee.2021.25.4.664

Design of an Optimized GPGPU for Data Reuse in DeepLearning Convolution  

Nam, Ki-Hun (Dept. of Computer Eng.)
Lee, Kwang-Yeob (Dept. of Computer Eng.)
Jung, Jun-Mo (Dept. of Electronics Eng., Seokyeong University)
Publication Information
Journal of IKEEE / v.25, no.4, 2021 , pp. 664-671 More about this Journal
Abstract
This paper proposes a GPGPU structure that can reduce the number of operations and memory access by effectively applying a data reuse method to a convolutional neural network(CNN). Convolution is a two-dimensional operation using kernel and input data, and the operation is performed by sliding the kernel. In this case, a reuse method using an internal register is proposed instead of loading kernel from a cache memory until the convolution operation is completed. The serial operation method was applied to the convolution to increase the effect of data reuse by using the principle of GPGPU in which instructions are executed by the SIMT method. In this paper, for register-based data reuse, the kernel was fixed at 4×4 and GPGPU was designed considering the warp size and register bank to effectively support it. To verify the performance of the designed GPGPU on the CNN, we implemented it as an FPGA and then ran LeNet and measured the performance on AlexNet by comparison using TensorFlow. As a result of the measurement, 1-iteration learning speed based on AlexNet is 0.468sec and the inference speed is 0.135sec.
Keywords
Data Reuse; CNN; GPGPU; Row stationary; SIMT; Warp; Register bank;
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