Browse > Article
http://dx.doi.org/10.7471/ikeee.2020.24.3.890

A Study on ESD Protection Circuit with High Holding Voltage with Parallel PNP and N+ difrt inserted  

Kwak, Jae-Chang (Dept. of Software, Seokyeong University)
Publication Information
Journal of IKEEE / v.24, no.3, 2020 , pp. 890-894 More about this Journal
Abstract
In this paper, we propose an ESD protection device with improved electrical characteristics through structural changes of LVTSCR, a typical ESD protection device. The proposed ESD protection device has a higher holding voltage than the existing LVTSCR by inserting a long N+ drift region and additional P-Well and N-Well, and improves the latch-up immunity, a chronic disadvantage of a general SCR-based ESD protection device. In addition, the effective base width of parasitic BJTs was set as a design variable, and the electrical characteristics of the proposed ESD protection device were verified through Synopsys' TCAD simulation so that it can be applied to the required application by applying the N-Stack technology.
Keywords
ESD; SCR; LVTSCR; Holding Voltage; N-Stack;
Citations & Related Records
연도 인용수 순위
  • Reference
1 Z. Wang, R. C. Sun, J. J. Liou and D. G. Liu, "Optimized pMOS-Triggered Bidirectional SCR for Low-Voltage ESD Protection Applications," IEEE Transactions on Electron Devices, vol.61, no.7, pp.2588-2594, 2014. DOI: 10.1109/TED.2014.2320827   DOI
2 F. Ma, B. Zhang, Y. Han, J. Zheng, B. Song, S. Dong and H. Liang, "High Holding Voltage SCR-LDMOS Stacking Structure With Ring- Resistance-Triggered Technique," IEEE Electron Device Letters, vol.34, no.9, pp.1178-1180, 2013. DOI: 10.1109/LED.2013.2272591   DOI
3 M. D. Ker and K. C. Hsu, "Overview of onchip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits," IEEE Transactions on Device and Materials Reliability, vol.5, no.2, pp.235-249, 2005. DOI: 10.1109/TDMR.2005.846824   DOI
4 Z. Liu, J. J. Liou, S. Dong, and Y. Han, "Silicon-Controlled Rectifier Stacking Structure for High-Voltage ESD Protection Applications," IEEE Electron Devices Letters, vol.31, no.8, pp. 845-847, 2010. DOI: 10.1109/LED.2010.2050575   DOI
5 Y. C. Huang and M. D. Ker, "A Latchup-Immune and Robust SCR Device for ESD Protection in 0.25-um 5-V CMOS Process," IEEE Electron Device Letters, vol.34, no.5, pp.674-676, 2013. DOI: 10.1109/LED.2013.2252456   DOI