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http://dx.doi.org/10.7471/ikeee.2020.24.1.200

Design of Area-efficient Feature Extractor for Security Surveillance Radar Systems  

Choi, Yeongung (School of Electronics and Information Engineering, Korea Aerospace University)
Lim, Jaehyung (School of Electronics and Information Engineering, Korea Aerospace University)
Kim, Geonwoo (School of Electronics and Information Engineering, Korea Aerospace University)
Jung, Yunho (School of Electronics and Information Engineering, Korea Aerospace University)
Publication Information
Journal of IKEEE / v.24, no.1, 2020 , pp. 200-207 More about this Journal
Abstract
In this paper, an area-efficient feature extractor was proposed for security surveillance radar systems and FPGA-based implementation results were presented. In order to reduce the memory requirements, features extracted from Doppler profile for FFT window-size are used, while those extracted from total spectrogram for frame-size are excluded. The proposed feature extractor was design using Verilog-HDL and implemented with Xilinx Zynq-7000 FPGA device. Implementation results show that the proposed design can reduce the logic slice and memory requirements by 58.3% and 98.3%, respectively, compared with the existing research. In addition, security surveillance radar system with the proposed feature extractor was implemented and experiments to classify car, bicycle, human and kickboard were performed. It is confirmed from these experiments that the accuracy of classification is 93.4%.
Keywords
Feature extraction; micro-doppler; radar; radar target classification; spectrogram;
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
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