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http://dx.doi.org/10.7471/ikeee.2019.23.3.988

A Study on the Design Methodology of CNTFET-based Digital Circuit  

Cho, Geunho (Dept. of Electronics Engineering, Seokyeong University)
Publication Information
Journal of IKEEE / v.23, no.3, 2019 , pp. 988-993 More about this Journal
Abstract
Over the past decades, the semiconductor industry has continuously scaled down the size of semiconductor devices to increase those performance and to integrate them at higher density on the chip. However, facing the reduction of gate control, higher leakage current, and short channel effect, there is a growing interest in next-generation semiconductors which can overcome these problems. In this paper, we discuss digital circuit design techniques using CNTFET(Carbon NanuTube Field Effect Transistor), which are attracting attention as candidates for the next generation of semiconductors. Since the structure of CNTFETs are clearly different from the structure of the structure of conventional MOSFETs, we will discuss how to utilize existing digital circuit methodology when designing digital circuits using the CNTFETs, and then simulate the performance differences between the two devices.
Keywords
CNTFET; CNT; CNT Density; Digital Circuit; Delay;
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