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http://dx.doi.org/10.7471/ikeee.2019.23.3.984

Hardware design for haze removal of single image using cumulative histogram  

Lee, Seungmin (Dept. of Electronics Engineering, Dong-A University)
Kang, Bongsoon (Dept. of Electronics Engineering, Dong-A University)
Publication Information
Journal of IKEEE / v.23, no.3, 2019 , pp. 984-987 More about this Journal
Abstract
Recently, autonomous driving technology based on object recognition and lane recognition has attracted attention. However, in foggy weather, haze removal technology is needed because it is difficult to recognize surrounding objects. The technology of removing hazy is currently being studied in many ways, and a single image based haze removal algorithms are typical. In this paper, we design the hardware for haze removal by estimating the hazy partical map. Proposed hardware architecture is designed to have a cumulative histogram based filter that does not affect the hardware size even if the window size of filter increases. The hardware design is implemented with XILINX's xc7z045-ffg900 as the target board.
Keywords
haze removal; hardware implementation; cumulative histogram; single image; FPGA;
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