1 |
G. Goto et al., "A 54 x 54-b regularly structured tree multiplier," IEEE J. Solid-State Circuits, vol.27, no.9, pp.1229-1236, 1992. DOI: 10.1109/4.149426
DOI
|
2 |
S. F. Hisao, M. R. Jiang, and J. S. Yeh, "Design of high-speed low-power 3-2 counter and 4-2 compressor for fast multiplier," Electron. Lett, vol.34, no.4, pp.341-343, 1998. DOI: 10.1049/el:19980306
DOI
|
3 |
S. Goel, M. A. Elgamel and M. A. Bayoumi, "Novel Design Methodology for High-Performance XOR-XNOR Circuit Design," "Proc. of the 16th Symposium on Integrated Circuits and Systems Design (SBCCI'03), pp.71-76, 2003. DOI: 10.1109/SBCCI.2003.1232809
DOI
|
4 |
M. A. Elgamel, S. Goel, and M. A. Bayoumi, "Noise Tolerant Low Voltage XOR-XNOR for Fast Arithmetic," "Proc. of the Great Lake Symposium on VLSI, pp.14-16, 2003. DOI: 10.1145/764808.764882
|
5 |
J. M. Wang, S. C. Fang, and W. S. Feng, "New Efficient Designs for XOR and XNOR Functions on the Transistor Level," IEEE journal of solid-state circuits, vol.29, no.7, pp.780-786, 1994. DOI: 10.1109/4.303715
DOI
|
6 |
M. Kumar and J. Nath, "Design of an Energy Efficient 4-2 Compressor," Proc. of the international conference on materials science and engineering (ICMAEM), pp.1-8, 2017. DOI: 10.1088/1757-899X/225/1/012136
|
7 |
J. B. Kim, S. J. Hong, and J. Kim, "New Circuits for XOR and XNOR Functions," Int. J. Electronics, vol.32, no.2, pp.131-144, 1997. DOI: 10.1080/002072197136138
DOI
|
8 |
S. Kumar and M. Kumar, "4-2 Compressor Design with New XOR-XNOR Module," Proc. of the 4th international conference on advanced computing & communication technologies (ACCT), pp.106-111, 2014. DOI: 10.1109/ACCT.2014.36
DOI
|