1 |
W.-Y. Pang, C.-S. Wang, Y.-K. Chang, N.-K. Chou, and C.-K. Wang, "10-bit 500-KS/s low power SAR ADC with splitting capacitor for biomedical applications," IEEE ASSCC Tech. Papers, pp. 149-52, 2009. DOI: 10.1109/ASSCC.2009.5357200
|
2 |
C.-C. Liu, S.-J. Chang, G.-Y. Huang, and Y.-Z. Lin, "10-bit 50-MS/s SAR ADC with a monotonic capacitor switching procedure," IEEE J. Solid-State Circuits, vol. 45, no. 4, pp. 731-740, 2010. DOI: 10.1109/JSSC.2010.2042254
DOI
|
3 |
Y. Zhu, C.-H. Chan, U.-F. Chio, S.-W. Sin, S.-P. U, and R. P. Martins, "A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS," IEEE J. Solid-State circuits, vol. 45, no. 6, pp. 1111-1121, 2010. DOI: 10.1109/JSSC.2010.2048498
DOI
|
4 |
G.-Y. Huang, S.-J. Chang, C.-C. Liu, and Y.-Z. Lin, "10-bit 30-MS/s SAR ADC using switchback switching method," IEEE Transactions on VLSI Systems, vol. 21, no. 3, pp. 584-588, 2013. DOI: 10.1109/TVLSI.2012.2190117
DOI
|
5 |
H.-S. Lee, D. A. Hodges, and P. R. Gray, "A Self-Calibrating 15 Bit CMOS A/D Converter," IEEE J. Solid-State circuits, vol. sc-19, no. 6, pp. 813-819, 1984. DOI: 10.1109/JSSC.1984.1052231
|
6 |
J.-Y. Um, Y.-J. Kim, E.-W. Song, J.-Y. Sim, and H.-J. Park, "A Digital-Domain Calibration of Split-Capacitor DAC for a Differential SAR ADC Without Additional Analog Circuit," IEEE Transactions on circuit and systems, vol. 60, no. 11, pp. 2845-2856, 2013. DOI: 10.1109/TCSI.2013.2252475
DOI
|
7 |
E. Youn and Y.-C. Jang, "12-bit 20M-S/s SAR ADC using C-R DAC and Capacitor Calibration," IEEE ISOCC, pp. 1-2, 2018. DOI: 10.1109/ISOCC.2018.8649894
|
8 |
S.-M. Park, Y.-H. Jeong, Y.-J. Hwang, P.-H. Lee, Y.-W. Kim, J. Son, H.-Y. Lee, and Y.-C. Jang, "A 10-bit 20-MS/s Asynchronous SAR ADCwith Meta-stability Detector using Replica Comparators," IEICE transaction on Electronics, vol. E99-C, no. 6, pp. 651-654, 2016. DOI: 10.1587/transele.E99.C.651
DOI
|