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http://dx.doi.org/10.7471/ikeee.2017.21.4.341

Design of the Low-Power Continuous-Time Sigma-Delta Modulator for Wideband Applications  

Kim, Kunmo (Apple Incorporated)
Park, Chang-Joon (Intersil Corporation)
Lee, Sanghun (Wavepia Incorporated)
Kim, Sangkil (Qualcomm Incorporated)
Kim, Jusung (Dept. of Electronics & Control Engineering, Hanbat National University)
Publication Information
Journal of IKEEE / v.21, no.4, 2017 , pp. 331-337 More about this Journal
Abstract
In this paper, we present the design of a 20MHz bandwidth 3rd-order continuous-time low-pass sigma-delta modulator with low-noise and low-power consumption. The bandwidth of the system is sufficient to accommodate LTE and other wireless network standards. The 3rd-order low-pass filter with feed-forward architecture achieves the low-power consumption as well as the low complexity. The system uses 3bit flash quantizer to provide fast data conversion. The current-steering DAC achieves low-power and improved sensitivity without additional circuitries. Cross-coupled transistors are adopted to reduce the current glitches. The proposed system achieves a peak SNDR of 65.9dB with 20MHz bandwidth and power consumption of 32.65mW. The in-band IM3 is simulated to be 69dBc with 600mVp-p two tone input tones. The circuit is designed in a 0.18-um CMOS technology and is driven by 500MHz sampling rate signal.
Keywords
Sigma-Delta Modulator; ADC; Wideband; Feed-forward; DAC;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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