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http://dx.doi.org/10.7471/ikeee.2015.19.4.514

Development of Gate Structure in Junctionless Double Gate Field Effect Transistors  

Cho, Il Hwan (Dept. of Electronic Engineering, Myongji University)
Seo, Dongsun (Dept. of Electronic Engineering, Myongji University)
Publication Information
Journal of IKEEE / v.19, no.4, 2015 , pp. 514-519 More about this Journal
Abstract
We propose the multiple gate structure of double gate junctionless metal oxide silicon field oxide transistor (JL MOSFET) for device optimization. Since different workfunction within multiple metal gates, electric potential nearby source and drain region is modulated in accordance with metal gate length. On current, off current and threshold voltage are influenced with gate structure and make possible to meet some device specification. Through the device simulation work, performance optimization of double gate JL MOSFETs are introduced and investigated.
Keywords
device optimization; multiple gate; junctionless field effect transistor; threshold voltage; subthreshold swing;
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Times Cited By KSCI : 2  (Citation Analysis)
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