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http://dx.doi.org/10.7471/ikeee.2015.19.4.506

A Capacitorless Low-Dropout Regulator With Enhanced Response Time  

Yeo, Jae-Jin (Dept. of Electronics and Communication Engineering, Hanyang University)
Roh, Jeong-Jin (Dept. of Electronics and Communication Engineering, Hanyang University)
Publication Information
Journal of IKEEE / v.19, no.4, 2015 , pp. 506-513 More about this Journal
Abstract
In this paper, an output-capacitorless, low-dropout (LDO) regulator is designed, which consumes $4.5{\mu}A$ quiescent current. Proposed LDO regulator is realized using two amplifier for good load regulation and fast response time, which provide high gain, high bandwidth, and high slew rate. In addition, a one-shot current boosting circuit is added for current control to charge and discharge the parasitic capacitance at the pass transistor gate. As a result, response time is improved during load-current transition. The designed circuit is implemented through a $0.11-{\mu}m$ CMOS process. We experimentally verify output voltage fluctuation of 260mV and recovery time of $0.8{\mu}s$ at maximum load current 200mA.
Keywords
Capacitorless LDO; DC-DC converter; fast transient response; low quiescent current; slew rate;
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