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http://dx.doi.org/10.7471/ikeee.2015.19.1.087

A 145μW, 87dB SNR, Low Power 3rd order Sigma-Delta Modulator with Op-amp Sharing  

Kim, Jae-Bung (Dept. of Electronics Engineering, Chonbuk University)
Kim, Ha-Chul (Dept. of Information and Communication Engineering, Republic of Korea Naval Academy)
Cho, Seong-Ik (Dept. of Electronics Engineering, Chonbuk University)
Publication Information
Journal of IKEEE / v.19, no.1, 2015 , pp. 87-93 More about this Journal
Abstract
In this paper, a $145{\mu}W$, 87dB SNR, Low power 3rd order Sigma-Delta Modulator with Op-amp sharing is proposed. Conventional architecture with analog path and digital path is improved by adding a delayed feed -forward path for disadvantages that coefficient value of the first integrator is small. Proposed architecture has a larger coefficient value of the first integrator to remove the digital path. Power consumption of proposed architecture using op-amp sharing is lower than conventional architecture. Simulation results for the proposed SDM designed in $0.18{\mu}m$ CMOS technology with power supply voltage 1.8V, signal bandwidth 20KHz and sampling frequency 2.8224MHz shows SNR(Signal to Noise Ratio) of 87dB, the power consumption of $145{\mu}W$.
Keywords
Sigma-Delta modulator; Op-amp sharing; Low power; Analog pass; Digital pass;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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