1 |
Junseo Kim, "A Design of Tile based rendering for a Multi-Core GPU", Master's thesis, SeoKyeong University. Seoul, February 2012.
|
2 |
Dong-Young Yeo, "A Design of a 3D Graphics pipeline based on Multi-core Processor", Master's thesis, SeoKyeong University. Seoul, February 2011.
|
3 |
Imagination Technologies. "3D Graphical Processing(Tile Based Rendering the Future of 3D)," white paper. imagination Tech. Corp, 2000
|
4 |
Macr Olano. Trey Greem. "Triangle scan conversion using 2D Homogeneous coordinates," Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware. pp89-95. Los Angeles. California. United States, August 1997.
|
5 |
Chinh-Chieh Hsiao and Chung-ping Chung and Hui-Chin Yang, "A Herarchical Primitive Lists Structure for Tile-Based Rendering" Computational Science and Engineering, Vol2. pp. 408 Vancouver, BC. Aug 2009.
|
6 |
James Blinn, "Jim Blinn's Corner: Calculating Screen Coverage", IEEE Computer Graphics & Applications, IEEE Computer Society, Los Alamitos, CA, May 1996
|
7 |
Imagination Technologies. "3D Graphical Processing(Tile Based Rendering the Future of 3D)," white paper. imagination Tech. Corp., 2000.
|
8 |
Kwang-Yeob Lee, Chi-Yong Kim, "Implementation of Parallel Processing Interpolation Algorithm for Multicore GPU", Journal of IKEEE. Vol.16, No.4, 304-309, December 2012.
과학기술학회마을
DOI
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9 |
Jangseo Ku, "Design of a Rasterizer based on Parallel Processing Interpolation Algorithm for a Mobile GPU", Master's thesis, SeoKyeong University. Seoul, February 2013.
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