The SCR-based ESD Protection Circuit with High Latch-up Immunity for Power Clamp |
Choi, Yong-Nam
(Dept. of Electronics and Electrical Engineering, Dankook University)
Han, Jung-Woo (Dept. of Electronics and Electrical Engineering, Dankook University) Nam, Jong-Ho (Dept. of Electronics and Electrical Engineering, Dankook University) Kwak, Jae-Chang (Dept. of Computer Science, Seokyeong University) Koo, Yong-Seo (Dept. of Electronics and Electrical Engineering, Dankook University) |
1 | Ming-Dou Ker, Cheng-Cheng Yen, "Investigation and Design of On-Chip Power-Rail ESD Clamp Circuits Without Suffering Latchup-Like Failure During System-Level ESD Test", IEEE Journal of Solid-State Circuit, vol.43, no.11, pp. 2533-2545, November, 2008. DOI |
2 | O. Semenov, H. Sarbishaei, M, Sachdev, ESD Protection Device and Circuit Design for Advanced CMOS Technologies, Springer, Waterloo, 2008. |
3 | Fred G. Kouper, "Design of SCR-based ESD Protection Considerations in Advanced High-Voltage Technologies for Automotive" in Proc. of the EOS/ESD Symp, pp. 54-63, September, 2006. |
4 | Kui-Dong Kim, Jo-woon Lee, Sang-Jo Park, Yoon-sik Lee, Yong-Seo Koo, "A Study on the Novel SCR NANO ESD Protection Device Design and fabrication" in Proc. of the IKEEE, Vol.9, No.2, pp. 161-169, 2005. |
5 | B. Keppens, Markus P. J. Mergence, Cong Son Trinh, Christian C. Russ, Bejamin Van Camp, Koen G. Verhaege, "ESD Protection Solutions for High Voltage Technologies" in Proc. EOS/ESD Symp., pp. 1-10, September, 2004. |
6 | W. Y. Chen, M. D. Ker, Y. J. Huang, Y. N. Jou, and G. L. Lin, "Measurement on Snapback Holding voltage of High-Voltage LDMOS for Latch-up Consideration," Circuits and Systems, APCCAS, pp. 61-64, December, 2008. |
7 | Albert Z. H. Wang, On-Chip ESD Protection for Integrated Circuits 2nd ed., Springer, US, 2002. |