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http://dx.doi.org/10.7471/ikeee.2011.15.1.029

Design of a Digitally Controlled LC Oscillator Using DAC for WLAN Applications  

Seo, Hee-Teak (Dept. of Electronics Engineering, University of Incheon)
Park, Jun-Ho (Dept. of Electronics Engineering, University of Incheon)
Kwon, Duck-Ki (Fairchild Korea)
Park, Jong-Tae (Dept. of Electronics Engineering, University of Incheon)
Yu, Chong-Gun (Dept. of Electronics Engineering, University of Incheon)
Publication Information
Journal of IKEEE / v.15, no.1, 2011 , pp. 29-36 More about this Journal
Abstract
Dithering scheme has been widely used to improve the resolution of DCO(Digitally Controlled Oscillator) in conventional ADPLLs(All Digital Phase Locked Loop). In this paper a new resolution improvement scheme is proposed where a simple DAC is employed to overcome the problems of dithering scheme. A 2.4GHz LC-based DCO has been designed in a $0.13{\mu}m$ CMOS process with an enhanced frequency resolution for wireless local area network applications. It has a frequency tuning range of 900MHz and a resolution of 58.8Hz. The frequencies are controled by varactors in coarse, fine, and DAC bank. The DAC bank consists of an inversion mode NMOS varactor. The other varactor banks consist of PMOS varactors. Each varactor bank is controlled by 8bit digital signal. The designed DCO exhibits a phase noise of -123.8dBc/Hz at 1MHz frequency offset. The DCO core consumes 4.2mA from 1.2V supply.
Keywords
LC DCO; ADPLL; DAC; WLAN;
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