Spread Spectrum Clock Generator with Multi Modulation Rate Using DLL (Delay Locked Loop) |
Shin, Dae-Jung
(DOESTEK Co., Ltd.)
Yu, Byeong-Jae (School of Electrical, Electronics, and Control Engineering, Kongju University) Kim, Tae-Jin (DOESTEK Co., Ltd.) Cho, Hyun-Mook (School of Electrical, Electronics, and Control Engineering, Kongju University) |
1 | H. S. Li, Y. C. Cheng, and D. Puar, "Dual-loop spread-spectrum clock generator," IEEE International Solid-State Circuits Conference. Dig. Tech. Papers, pp. 184-185. 1999. |
2 | Deok Soo Kim, "A Spread Spectrum Clock Generation PLL with Dual tone Modulation Profile," IEEE Symposium on VLSI Circuit Digest of Technical papers, pp. 96-99, Jun., 2005 |
3 | M. Sugawara et al., " 1.5-Gb/s 5150-ppm spread-spectrum SerDes PHY with a 0.3-mW 1.5-Gb/s level detector for serial ATA," in Symp. VLSI Circuits Dig. Tech. Papers, June 2002, pp. 60-63 |
4 | H. S. Li, Y. C. Cheng, and D. Puar, " Dual-loop spread-spectrum clock generator," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 1999, pp. 184-185. |
5 | Wei-Ta chen, Jen-Chien Hsu, "A Spread Spectrum Clock Generator for SATA-II," IEEE International Symposium on Circuits and Systems, vol. 3, pp. 2643-2646, May. 2005. |
6 | Y. Moon, D. K. Jeong, and G. Kim, " Clock dithering for electromagnetic compliance using spread-spectrum phase modulation," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 1999, pp. 186-187. |