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http://dx.doi.org/10.7471/ikeee.2011.15.1.023

Spread Spectrum Clock Generator with Multi Modulation Rate Using DLL (Delay Locked Loop)  

Shin, Dae-Jung (DOESTEK Co., Ltd.)
Yu, Byeong-Jae (School of Electrical, Electronics, and Control Engineering, Kongju University)
Kim, Tae-Jin (DOESTEK Co., Ltd.)
Cho, Hyun-Mook (School of Electrical, Electronics, and Control Engineering, Kongju University)
Publication Information
Journal of IKEEE / v.15, no.1, 2011 , pp. 23-28 More about this Journal
Abstract
This paper describes design and implementation of a spread spectrum clock generator(SSCG). The proposed architecture generates the spread spectrum clock controlling a input voltage signal for VCDL(Voltage Controlled Delay Line). Spread charge pump is controlled by the SSC modulation logic block provides a control signal to VCDL through LPF in DLL. By using this architecture, chip area and power consumption can be reduced because it is not necessary additional circuit to control modulation rate. This circuit has been designed and fabricated using the UMC 0.25um CMOS technology. The chip occupies an area of 290${\times}$120um^2.
Keywords
Spread Spectrum Clock; SSCG; DLL; modultion rate; VCDL;
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