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Log Buffer Management Scheme for NAND Flash Memory in Real-Time Systems  

Cho, Hyun-Jin (성균관대학교 컴퓨터공학과)
Ha, Byung-Min (성균관대학교 컴퓨터공학과)
Shin, Dong-Kun (성균관대학교 컴퓨터공학과)
Eom, Young-Ik (성균관대학교 컴퓨터공학과)
Abstract
Flash memory is suitable for real time systems because of its consistent performance for random access, low power consumption and shock resistance. However, flash memory needs blocking time to perform a garbage collection to reclaim invalidated pages. Moreover, the worst-case garbage collection time is significantly longer than the best-case garbage collection time. In this paper, we propose a FTL (Flash Translation Layer) mapping scheme called KAST (K-Associative Sector Translation). In the KAST scheme, user can control the maximum association of the log block to limit the worst-case garbage collection time. Performance evaluation using simulation shows that not only KAST completes the garbage collection within the specified time but also provides about 10~15% better average performance than existing FTL schemes.
Keywords
Flash memory; FTL(Flash Translation Layer); log buffer management scheme; realtime systems;
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1 J.-U. Kang, J.-S. Kim, C. Park, H.Park, and J. Lee. A multichannel architecture for high-performance nand flash-based storage system. Journal of Systems Architecture, 53(9):644-658, 2007.   DOI   ScienceOn
2 L.-P, Chang, T.-W. Kuo, and S.-W. Lo, Realtime garbage collection for flash-memory storage systems of real-time embedded systems. ACM Transactions on Embedded Computing Systems, 3(4):837-863, 2004.   DOI
3 J.-U. Kang, H. Jo, J.-S. Kim, and J. Lee. A superblock-based flash translation layer for nand flash memory. In Proc. of Intermational conference on Embedded Software (EMSOFT), pp.161-170, 2006.
4 S. Lee, D. Shin, Y. Kim, and J. Kim. Last: locality-aware sector translation for nand flash memory-based storage systems. In Proc. of IEEE International Workshop on Storage and I/O Virtualization, Performance, Energy, Evaluation and Dependability (SPEED08), 2008.
5 S. -Y, Park, W. Cheon, Y. Lee, M.-S. Jung, W. Cho, and H. Yoon, A re-configurable ftl (flash translation layer) architecture for nand flash based applications. In Proc. of International Workshop on Rapid System Prototyping, pp.202-208, 2007.
6 Y.-H. Bae. Design of a high performance flash memory-based solid state disk. Journal of Korean Institute of Information Scientists and Engineers, 25(6), 2007.
7 Postmark benchmark, J.Katcher, Postmark: A new file system benchmark, 1997.
8 J. Kim, J.-M. Kim, S.-H.Noh, S.-L. Min, and Y.Cho. A spae-efficient flash translation layer for compact flash systems. IEEE Transactions on Consumer Electronics, 48(2), 366-375, 2002.   DOI   ScienceOn
9 Bonnie benchmark, http://www.textuality.com/bonnie/.
10 S. -W. Lee, D. -J. Park, T. -S. Chung, D. -H. Lee, S. Park, and H. J. Song. A log buffer-based flash translation layer using fully-associative sector translation. ACM Transactions on Embedded Computing System, 6(3), 2007.