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Reallocation Data Reusing Technique for BISR of Embedded Memory Using Flash Memory  

Shim, Eun-Sung (숭실대학교 컴퓨터학과)
Chang, Hoon (숭실대학교 컴퓨터학부)
Publication Information
Journal of KIISE:Computer Systems and Theory / v.34, no.8, 2007 , pp. 377-384 More about this Journal
Abstract
With the advance of VLSI technology, the capacity and density of memories is rapidly growing. In this paper, We proposed a reallocation algorithm for faulty memory part to efficient reallocation with row and column redundant memory. Reallocation information obtained from faulty memory by only every test. Time overhead problem occurs geting reallocation information as every test. To its avoid, one test resulted from reallocation information can save to flash memory. In this paper, reallocation information increases efficiency using flash memory.
Keywords
BIRA; BISR; Embedded Memory; Flash Memory;
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1 R. Dean Adams, 'High Performance Memory Testing: Design Principles, Fault Modeling and Self-Test,' Kluwer Academic Publishers, 2003
2 Chin Long Wey, and Lombardi F., 'On the Repair of Redundant RAM's,' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 6, pp. 222-231, March 1987   DOI   ScienceOn
3 Jone W.B., Huang D.C., Wu S.C., and Lee K.J., 'An efficient BIST method for distributed small buffers,' IEEE Transactions on Very Large Scale Integration Systems, vol. 10, pp. 512-515, August 2002   DOI   ScienceOn
4 Shyue Kung Lu, Yu Chen Tsai, Hsu C. H., Kuo Hua Wang, and Cheng Wen Wu, 'Efficient builtin redundancy analysis for embedded memories with 2-D redundancy,' IEEE Transactions on Very Large Scale Integration Systems, vol. 14, pp. 34-42, January 2006   DOI
5 V. Schober, S. Paul, and O. Picot, 'Memory Built-In Self-Repair using redundant words,' Proceedings of International Test Conference, 2001
6 Horiguchi M., Etoh J., Aoki M., Itoh K., and Matsumoto T., 'A flexible redundancy technique for high-density DRAMs,' IEEE Journal of Solid-State Circuits, vol. 26, pp. 12-17, January 1991   DOI   ScienceOn
7 Sy Yen Kuo, and Fuchs W.K., 'Efficient Spare Allocation in Reconfigurable Arrays,' Conference on Design Automation, pp. 385-390, 29-2 June 1986
8 Heon Cheol Kim, Dong Soon Yi, Jin Young Park, and Chang Hyun Cho, 'A BISR (built-in self-repair) circuit for embedded memory with multiple redundancies,' International Conference on VLSI and CAD, pp. 602-605, 26-27 October 1999
9 Hamdioui S., and van de Goor A.J., 'Thorough testing of any multiport memory with linear tests,' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 21, pp. 217-231, February 2002   DOI   ScienceOn
10 Ilyoung Kim, Zorian Y., Komoriya G., Pham H., Higgins F.P., and Lewandowski J.L., 'Built in self repair for embedded high density SRAM,' Proceedings of International Test Conference, pp. 1112-1119, 18-23 October 1998
11 Allan A., Edenfeld D., Joyner W.H. Jr., Kahng A.B., Rodgers M., and Zorian, Y., '2001 technology roadmap for semiconductors,' Computer, vol. 35, pp. 42-53, January 2002   DOI
12 Wei Kang Huang, Yi Nan Shen, and Lombardi F., 'New approaches for the repairs of memories with redundancy by row/column deletion for yield enhancement,' IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems, vol. 9, pp. 323-328, March 1990   DOI   ScienceOn