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An Energy-Delay Efficient System with Adaptive Victim Caches  

Kim Cheol Hong (서울대학교 전기컴퓨터공학부)
Shim Sunghoon (서울대학교 전기컴퓨터공학부)
Jhon Chu Shik (서울대학교 전기컴퓨터공학부)
Jhang Seong Tae (수원대학교 컴퓨터학과)
Publication Information
Journal of KIISE:Computer Systems and Theory / v.32, no.11_12, 2005 , pp. 663-674 More about this Journal
Abstract
We propose a system aimed at achieving high energy-delay efficiency by using adaptive victim caches. Particularly, we investigate methods to improve the hit rates in the first level of memory hierarchy, which reduces the number of accesses to mort power consuming memory structures such as L2 cache. Victim cache is a memory element for reducing conflict misses in a direct-mapped L1 cache. We present two techniques to fill the victim cache with the blocks that have higher probability to be re-reqeusted by processor. Hit-based victim cache ks tilled with the blocks which were referenced frequently by processor. Replacement-based victim cache is filled with the blocks which were evicted from the sets where block replacements had happened frequently According to our simulations, replacement-based victim cache scheme outperforms the conventional victim cache scheme about $2\%$ on average and refutes the power consumption by up to $8\%$.
Keywords
computer architecture; hierarchical memory system; victim cathe; low power system;
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