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Sequential and Selective Recovery Mechanism for Value Misprediction  

이상정 (순천향대학교 정보기술공학부)
전병찬 (청운대학교 컴퓨터과학과)
Publication Information
Journal of KIISE:Computer Systems and Theory / v.31, no.1_2, 2004 , pp. 67-77 More about this Journal
Abstract
Value prediction is a technique to obtain performance gains by supplying earlier source values of its data dependent instructions using predicted value of a instruction. To fully exploit the potential of value speculation, however, the efficient recovery mechanism is necessary in case of value misprediction. In this paper, we propose a sequential and selective recovery mechanism for value misprediction. It searches data dependency chain of the mispredicted instruction sequentially without pipeline stalls and adverse impact on clock cycle time. In our scheme, only the dependent instructions on the predicted instruction is selectively squashed and reissued in case of value misprediction.
Keywords
superscalar processor; speculative execution; value prediction; value misprediction recovery;
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1 Sang-Jeong Lee and Pen-Chung Yew, 'On Augmenting Trace Cache for High-Bandwidth Value Prediction,' IEEE Transaction on Computers, Vol.51 No.9, pp.1074-1088, Sept. 2002   DOI
2 M.Lipasti and J.Shen, 'Exceeding the Limit via Value Prediction,' Proceedings of the 29th International Symposium on Microarchitecture (MICRO-29), Dec. 1996
3 M.Lipasti, Value Locality and Speculative Execution, Ph.D. Thesis in Electrical and Computer Engineering, Carnegie Mellon University, 1997
4 T.Sato, 'Evaluating the Impact of Reissued Instructions on Data Speculative Processor Performance,' Microprocessors and Microsystems, Vol. 25, Issue 9-10, pp.469-482, Elsevier, Jan. 2002   ScienceOn
5 Y.Sazeides and J.Smith, 'The Predictability of Data Values,' Proceedings of the 30th International Symposium on Microarchitecture (MICRO-30), Dec. 1997   DOI
6 Sang-Jeong Lee and Pen-Chung Yew, 'On Table Bandwidth and Its Update Delay for Value Prediction on Wide-Issue ILP Processors,' IEEE Transaction on Computers, Vol.50 No.8, pp.847-852, Aug. 2001   DOI
7 B.Rychlik, J.Faistl, B.Krug, and J.Shen, 'Efficacy and Performance Impact of Value Prediction,' Parallel Architectures and Compilation Techniques (PACT98), Paris, Oct. 1998   DOI
8 H.Zhou, C.Fu, E.Rotenberg, and T.Conte, A Study of Value Speculative Execution and Misspeculation Recovery in Superscalar Microprocessors, Technical Report, ECE Department, N.C. State University, Jan. 2001
9 D.Burger and T.Austin, The SimpleScalar Tool Set, Version 2.0, Technical Report CS-TR-97-1342, University of Wisconsin, Madison, June 1997
10 A.KleinOsowski, J.Flynn, N.Meares, and D.Lilja, 'Adapting the SPEC 2000 Benchmark Suite for Simulation-Based Computer Architecture Research,' Workshop on Workload Characterization held in conjunction with International Conference on Computer Design, Sept., 2000
11 K.Wang and M.Franklin, 'Highly Accurate Data Value Predictions using Hybrid Predictor,' Proceedings of the 30th International Symposium on Microarchitecture (MICRO-30), Dec. 1997   DOI
12 S.McFarling, 'Combining Branch Predictors,' Technical Report TN-36, Digital Western Research Laboratory, June 1993
13 T.Yeh and Y.Patt, 'Two-level Adaptive Branch Prediction,' Proceedings of the 24th International Symposium Microarchitecture (MICRO-24), Nov. 1991
14 B.Calder, G.Reinman and D.Tullsen, 'Selective Value Prediction,' Proceedings of the 26th International Symposium on Computer Architecture (ISCA-26), May 1999   DOI