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A Pixel Cache Architecture with Selective Loading Scheme based on Z-test  

이길환 (연세대학교 컴퓨터과학과)
박우찬 (세종대학교 컴퓨터공학부)
김일산 (연세대학교 컴퓨터과학과)
한탁돈 (연세대학교 컴퓨터과학과)
Publication Information
Journal of KIISE:Computer Systems and Theory / v.30, no.10, 2003 , pp. 579-585 More about this Journal
Abstract
Recently most of 3D graphics rendering Processors have the pixel cache storing depth data and color data to reduce the memory latency and the bandwidth requirement. In this paper, we propose the effective pixel cache for improving the performance of a rendering processor. The proposed cache system stores the depth data selectively based on the result of Z-test and the color data are stored into the auxiliary buffer. Simulation results show that the 16Kbyte proposed cache system provides better performance than the 32Kbyte conventional cache.
Keywords
3D Graphics Hardware; Pixel Cache; Depth Test;
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