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Virtual Platform($V_iP$) based SoC design technology  

Eo, Soo-Kwan (삼성전자)
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Communications of the Korean Institute of Information Scientists and Engineers / v.25, no.11, 2007 , pp. 89-96 More about this Journal
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  • Reference
1 Brian Bailey, Grant Martin, Andrew Piziali, 'ESL Design and Verification', ISBN 13: 978-0-12-373551-5, Elsevier Inc., 2007
2 I. Lee, H.Kim, P. Yang, S. Yoo, E. Chung, K. Choi, J. Kong, and S. Eo, 'PowerViP: SoC Power Estimation Framework at Transaction Level', Proc. Asia- South Pacific Design Automation Conference, Jan. 2006
3 S. Hong, S. Yoo, S. Lee, S. Lee, H. Nam, B. Yoo, J. Hwang, D. Song, J. Kim, J. Kim, H. Jin, K. Choi, J. Kong, and S. Eo, 'Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study', Proc. International Symposium on Hardware-Software Codesign and System Synthesis(CODES-ISSS), Oct. 2006
4 최규명, 정의영, 엄준형, 어수관, '플렛폼을 기반으로하는 SoC 설계 방법', 대한 전자공학학회 제 30권 제9호 Page 934, September 2003