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http://dx.doi.org/10.3745/KIPSTA.2011.18A.2.045

Implementation of Multi-Core Processor for Beamforming Algorithm of Mobile Ultrasound Image Signals  

Choi, Byong-Kook (울산대학교 컴퓨터정보통신공학부)
Kim, Jong-Myon (울산대학교 컴퓨터정보통신공학부)
Publication Information
The KIPS Transactions:PartA / v.18A, no.2, 2011 , pp. 45-52 More about this Journal
Abstract
In the past, a patient went to the room where an ultrasound image diagnosis device was set, and then he or she was examined by a doctor. However, currently a doctor can go and examine the patient with a handheld ultrasound device who stays in a room. However, it was implemented with only fundamental functions, and can not meet the high performance required by the focusing algorithm of ultrasound beam which determines the quality of ultrasound image. In addition, low energy consumption was satisfied for the mobile ultrasound device. To satisfy these requirements, this paper proposes a high-performance and low-power single instruction, multiple data (SIMD) based multi-core processor that supports a representative beamforming algorithm out of several focusing methods of mobile ultrasound image signals. The proposed SIMD multi-core processor, which consists of 16 processing elements (PEs), satisfies the high-performance required by the beamforming algorithm by exploiting considerable data-level parallelism inherent in the echo image data of ultrasound. Experimental results showed that the proposed multi-core processor outperforms a commercial high-performance processor, TI DSP C6416, in terms of execution time (15.8 times better), energy efficiency (6.9 times better), and area efficiency (10 times better).
Keywords
Beamforming Algorithm; Mobile Ultrasound; SIMD Based Multi-core Processor; Data Level Parallelism;
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Times Cited By KSCI : 4  (Citation Analysis)
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1 L. W. Tucker and G. G. Robertson, "Architecture and applications of the connection machine," IEEE Computer, Vol.21, No.8, pp.26-38, 1988.   DOI   ScienceOn
2 "Connection machine model CM-2 technical summary," Thinking Machines Corp., version 51, May, 1989.
3 MarPar (MP-2) System Data Sheet. MarPar Corporation, 1993.
4 M. J. Irwin and R. M. Owens, "A two-dimensional, distributed logic processor," IEEE Trans. on Computers, Vol.40, No.10, pp.1094-1101, 1991.   DOI   ScienceOn
5 M. Bolotski, R. Armithrajah, W. Chen, "ABACUS: A high performance architecture for vision," in Proceedings of the International Conference on Pattern Recognition, 1994.
6 J. F. Havlice and J. C. Taenzer, "Medical ultrasonic imaging: An overview of principles and instrumentation," Proceedings of IEEE, Vol.67, No.4, pp.620-640, April, 1979.   DOI   ScienceOn
7 M. E. Schafer and P. A. Lewin, "The influence of front-end hardware on digital ultrasonic imaging," IEEE Trans. Sonics Ultrasonics, Vol.SU-31, No.4, pp.295-306, July, 1984.   DOI   ScienceOn
8 S. M. Chai, T. Taha, D. S. Wills, and J. D. Meindl, "Heterogeneous architecture models for interconnect-motivated system design," IEEE Trans. on VLSI Systems, Vol.8, No.6, pp.660-670, 2000.   DOI   ScienceOn
9 V. Tiwari, S. Malik, and A. Wolfe, "Compilation techniques for low energy: An overview," in Proc. IEEE International Symposium on Low Power Electronics, pp.38-39, 1994.   DOI
10 Xilinx Vertex-4 FPGA XC4VLX60 data sheet, http://www.alldatasheet.net/datasheet-pdf/pdf/152986/XILINX/XC4VLX60.html.
11 A. D. Blas et. al, "The UCSC Kestrel Parallel Processor," IEEE Trans. on Parallel and Distributed Systems, Vol.16, No.1, pp.80-92, Jan., 2005.   DOI   ScienceOn
12 A. Gentile and D. S. Wills, "Portable video supercomputing," IEEE Trans. on Computers, Vol.53, No.8, pp.960-973, Aug., 2004.   DOI   ScienceOn
13 Luong V. Huynh, 김철홍, 김종면, "퍼지 백터 양자화를 위한 대규모 병렬 알고리즘", 한국정보처리학회논문지 A, 제16-A권, 제6호, 411-418쪽, 2009년 12월.
14 J. H. Kim, T. K. Song, and S. B. Park, "A pipelined sampled delay focusing in ultrasound imaging systems," Ultrasonic Imaging, Vol.9, pp.75-91, 1987.   DOI   ScienceOn
15 TMS320C64x families, http://www.bdti.com/procsum/tic64xx.htm.
16 ARM 926EJ-S data sheet, http://www.arm.com/products/processors/classic/arm9/arm926.php.
17 ARM 1020E data sheet, http://www.hotchips.org/archives/hc13/2_Mon/02arm.pdf
18 P. Ranganathan, S. Adve, and N. P. Jouppi, "Performance of image and video processing with general-purpose processors and media ISA extensions," in Proc. of the 26th International Symposium on Computer Architecture, pp.124-135, May, 1999.
19 R. Bhargava, L. John, B. Evans, and R. Radhakrishnan, "Evaluating MMX technology using DSP and multimedia applications," in Proc. of IEEE/ACM Symposium on Microarchitecture, pp.37-46, 1998.   DOI
20 N. Slingerland and A. J. Smith, "Measuring the performance of multimedia instruction sets," IEEE Trans. on Computers, Vol.51, No.11, pp.1317-1332, Nov., 2002.   DOI   ScienceOn
21 A. Krikelis, I. P. Jalowiecki, D. Bean, R. Bishop, M. Facey, D. Boughton, S. Murphy, and M. Whitaker, "A programmable processor with 4096 processing units for media applications," in Proc. of the IEEE International Conference on Acoustics, Speech, and Signal Processing, Vol.2, pp.937-940, May, 2001.   DOI
22 장성호, "초음파 영상진단장치(의료특집)", 대한전기학회논문지, 제48권, 제8호, 11-21쪽, 1998년 8월.
23 김성학, 이원석, 신은희, 배병국, 노용래, "64 채널 Phased array 초음파 트랜스듀서의 설계 및 제작", 한국음향학회논문지, 제29권, 제2호, 608-609쪽, 2010년.
24 이순흠, 최관순, 김동식, "가상 3D 그래픽을 이용한 집속형 초음파 탐촉자 성능평가 방법", 한국정보처리학회논문지 B, 제14-B권, 제6호, 407-412쪽, 2007년.   과학기술학회마을   DOI   ScienceOn
25 이후정, 이행세, 김영길, 이민화, "초음파 영상장치에서 측방향 해상도 향상에 관한 연구", 대한의사학회지, 제9권, 제1호, 87-92쪽, 1998년.   과학기술학회마을
26 T. R. Gururaja, and R. K. Panda, "Current status and future trends in ultrasonic transducers for medical imaging applications," in Proc. of the 11th IEEE International Symposium on Application of Ferroelectrics, pp.223-228, 1998.   DOI
27 X.-G. Jiang, J.-Y. Zhou, J.-H. Shi, H.-H. Chen "FPGA implementation of image rotation using modified compensated CORDIC," in Proc. of the 6th International Conference on ASIC, Vol.2, pp.752-756, 2005.
28 E. B. Bourennane, S. Bouchoux, J. Miteran, M. Paindavoine, S. Bouillant, "Cost comparison of image rotation implementations on static and dynamic reconfigurable FPGAs," in Proc. of IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP '02), Vol.3, pp.III-3176-3179, 2002.   DOI
29 이시현, "$Nios^{(R)}II$ 임베디드 프로세서를 사용한 병렬처리 시스템의 설계 및 구현", 한국컴퓨터정보학회논문지, 제14권, 제11호, 97-103쪽, 2009년 11월.   과학기술학회마을