Browse > Article
http://dx.doi.org/10.3745/KIPSTA.2006.13A.4.275

Using a H/W ADL-based Compiler for Fixed-point Audio Codec Optimization thru Application Specific Instructions  

Ahn Min-Wook (서울대학교 전기컴퓨터공학부)
Paek Yun-Heung (서울대학교 전기컴퓨터공학부)
Cho Jeong-Hun (경북대학교 전자전기컴퓨터학부)
Abstract
Rapid design space exploration is crucial to customizing embedded system design for exploiting the application behavior. As the time-to-market becomes a key concern of the design, the approach based on an application specific instruction-set processor (ASIP) is considered more seriously as one alternative design methodology. In this approach, the instruction set architecture (ISA) for a target processor is frequently modified to best fit the application with regard to code size and speed. Two goals of this paper is to introduce our new retargetable compiler and how it has been used in ASIP-based design space exploration for a popular digital signal processing (DSP) application. Newly developed retargetable compiler provides not only the functionality of previous retargetable compilers but also visualizes the features of the application program and profiles it so that it can help architecture designers and application programmers to insert new application specific instructions into target architecture for performance increase. Given an initial RISC-style ISA for the target processor, we characterized the application code and incrementally updated the ISA with more application specific instructions to give the compiler a better chance to optimize assembly code for the application. We get 32% performance increase and 20% program size reduction using 6 audio codec specific instructions from retargetable compiler. Our experimental results manifest a glimpse of evidence that a higgly retargetable compiler is essential to rapidly prototype a new ASIP for a specific application.
Keywords
Retargetable Compiler; Architecture Description Language; AC-3;
Citations & Related Records
연도 인용수 순위
  • Reference
1 S. Bilavarn, E. Debes, P. Vandergheynst and J. Diguet. Processor Enhancements for Media Streaming Applications, In Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology, Vol.41, No.2, 2005   DOI
2 J. Praet, D. Lanneer, W. Geurts and G. Goossens. Processor modeling and code selection for retargetable compilation, ACM Transactions on Design Automation of Electronic Systems, Vol.6, No.3, pp.277-307, July, 2001   DOI   ScienceOn
3 G. Araujo and S. Malik. Code generation for Fixed-point DSPs, In ACM Transactions on Design Automation of Electronic Systems, Vol.3, No.2, pp.136-161, April, 1998   DOI   ScienceOn
4 A. Appel, J. Davidson and N. Ramsey, The Zephyr Compiler Infrastructure. Technical Report at the University of Virginia, 1998
5 Associated Compiler Experts, Inc. http://www/ace/nl
6 J. Lee, K. Choi and N. Dutt. Efficient instruction encoding for automatic instruction set design of configurable ASIPs, In Proceedings of the IEEE/ACM international conference on Computer-aided design, San Jose, 2002   DOI
7 ATSC Standard: Digital Audio Compression (AC-3), Revision A, In Advanced Television Systems Committee, 20 August 2001
8 P. Mishra and N. Dutt. Architecture Description Languages for Programmable Embedded Systems, In IEE Proceedings on Computers and Digital Techniques, 2005   DOI   ScienceOn
9 P. Lapsely, et al. DSP Processor Fundamentals, Architectures and Features, In IEEE Press, 1997
10 K. Kim, J. Kang and W. Sung. AUTOSCALER For C: An Optimizing Floating-Point to Integer C Program Converter For Fixed-Point Digital Signal Processors, IEEE Transactions on Circuits Systems, Vol.47, No.9, Sep., 2000   DOI   ScienceOn
11 J. Staunstrup and W. Wolf. Hardware/Software Co-Design: Principles and Practice, Kluwer Academic Publishers, 1997
12 S. Jung and Y. Paek. The Very Portable Optimizer for Digital Signal Processors, In International Conference on Compilers, Architectures and Synthesis for Embedded Systems, pp.84-92, 2001   DOI
13 Steve Vernon. Dolby Digital: Audio Coding for Digital Television and Storage Applications, In AES 17th International conference on High Quality Audio Coding, September 1999, Florence, Italy
14 M. Hohenauer. A Methodology and Tool Suite for C compiler generation from ADL Processor Models, In Design Automation and Test in Europe Conference & Exhibition, Vol.2, 2004   DOI
15 M. Itoh, et. al. PEAS-III: An ASIP Design Environment. In Proceedings of the Int. Conf. on Computer Design, 2000   DOI
16 Coware, Inc. http://www.coware.com
17 S. Vernon. Design and implementation of AC-3 coders, In IEEE Transactions on Consumer Electronics, 1995   DOI   ScienceOn
18 J. Hennessy and D. Patterson. Computer Architecture: A Quantitative Approach, Morgan Kaufman Publishers, 2003
19 R. Stallman, Using and Porting GNU CC. Free Software Foundations, Feb. 1998
20 S. Hanono, S. Devadas, Instruction Selection, Resource Allocation, and Scheduling in the AVIV retargetable code generator, 35th Design Automation Conference(DAC), 1998   DOI
21 H. Scharwaechter, et. al. ASIP Architecture Exploration for Efficient IPSec Encryption: A Case Study, In ACM Transac. on Embedded Computing Systems, Vol.2, No.3, 2001
22 C. W. Fraser, et. al. BURG: fast optimal instruction selection and tree parsing, In ACM SIGPLAN Notices, pp.68-76, 1992   DOI
23 G. Hadjiyiannis, S. Hanano, and S. Devada. ISDL: An Instruction Set Description Language for Retargetability. In Proceedings of the 34th Design Automation Conference, pp. 299-302, 1997