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http://dx.doi.org/10.3745/KIPSTA.2002.9A.4.547

A Dynamic Routing Algorithm Adaptive to Traffic for Multistage Bus Networks in Distributed Shared Memory Environment  

Hong, Kang-Woon (한국전자통신연구원 네트워크연구소)
Jeon, Chang-Ho (한양대학교 전자컴퓨터공학부)
Abstract
This paper proposes an efficient dynamic routing algorithm for Multistage Bus Networks(MBN's) in distributed shared memory environment. Our algorithm utilizes extra paths available on MBN and determines routing paths adaptively according to switch traffic in order to distribute traffic among switches. Precisely, a packet is transmitted to the next switch on an extra path having a lighter traffic. As a consequence the proposed algorithm reduces the mean response time and the average number of waiting tasks. The results of simulations, carried out with varying numbers of processors and varying switch sizes, show that the proposed algorithm improves the mean response time by 9% and the average number of waiting tasks by 21.6%, compared to the existing routing algorithms which do not consider extra paths on MBN.
Keywords
Multistage Bus Network; Routing Algorithm; Buddy Property; Extra Path; Simulation;
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1 P. T. Gaughan and S. Yalamanchili, 'Adaptive Routing Protocols for Hypercube Interconnection Networks,' IEEE Computer, Vol.26, No.5, pp.12-23, May, 1993   DOI   ScienceOn
2 A. K. Kanda, 'Design and Analysis of Cache Coherent Multistage Interconnection Networks,' IEEE Trans. on Computers, Vol.42, No.4, pp.458-470, Apr., 1993   DOI   ScienceOn
3 D. P. Agrawal, 'Graph Theoretical Analysis and Design of Multistage Interconnection Networks,' IEEE Trans. on Computers, Vol.C-32, No.7, pp.637-648, Jul., 1983   DOI   ScienceOn
4 T. Fen, 'A Survey of Interconnection Networks,' IEEE Computer, Dec., 1981   DOI   ScienceOn
5 M. stumm and S. Zhou, 'Algorithms Implementing Distributed Shared Memory,' IEEE Computer, Vol.23, No.5, pp. 54-64, May, 1990   DOI   ScienceOn
6 G. S. Almasi and A. Gottlieb, 'Highly Parallel Computing,' 2nd Ed., Benjamin/Cummings Pub. Co., 1994
7 S. M. Mahmud, 'Performance Analysis Of Multilevel Bus Networks For Hierarchical Multiprocessors,' IEEE Trans. on Computers, Vol.43, No.7, pp.789-805, Jul., 1994   DOI   ScienceOn
8 L. N. Bhuyan, A. K. Kanda, and T. Askar, 'Performance and Reliability of the Multistage Bus Networks,' Proc. of the Int'l. Conf. on Parallel Processing, pp.26-33, Aug., 1994   DOI
9 L. K. John and Y. Liu, 'Performance Model for a Prioritized Multiple-Bus Multiprocessor System,' IEEE Trans. on Computers, Vol.45, No.5, pp.580-588, May, 1996   DOI   ScienceOn
10 L. N. Bhuyan, R. R. Iyer, T. Askar, A. K. Nanda, and M. Kumar, 'Performance of Multistage Bus Networks for a Distributed Shared Memory Multiprocessor,' IEEE Trans. on Parallel and Distributed Systems, Vol.8, No.1, pp.82-95, Jan., 1997   DOI   ScienceOn
11 S. Chen, J. A. Stankovic, F. Kurose, and D. Towsley, 'Performance Evaluation of Two New Disk Scheduling Algorithms for Real-Time System,' Journal of Real-Time Systems, Vol.3, pp.307-336, Sept., 1991   DOI
12 J. Protic, M. Tomasevic, and V. Milutinovic, 'Distributed Shared Memory : Concepts and Systems,' IEEE Parallel & Distributed Technology, Vol.4, No.2, pp.63-79, Summer, 1996   DOI   ScienceOn