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http://dx.doi.org/10.3745/KIPSTC.2003.10C.1.071

The software architecture for the internal data processing in Gigabit IP Router  

Lee, Wang-Bong (한국전자통신연구원)
Chung, Young-Sik (한국전자통신연구원)
Kim, Tae-Il (한국전자통신연구원)
Bang, Young-Cheol (한국산업기술대학교 컴퓨터공학과)
Publication Information
The KIPS Transactions:PartC / v.10C, no.1, 2003 , pp. 71-76 More about this Journal
Abstract
Internet traffic is getting tremendously heavier due to the exponential growth of the Internet users, the spread of the E-commerce and the network games. High-speed routers for fast packet forwarding are commercially available to satisfy the growing bandwidth. A high-speed router, which has the decentralized multiprocessing architecture for IP and routing functions, consists of host processors, line interfaces and switch fabrics. In this paper, we propose a software architecture tuned for high-speed non-forwarding packet manipulation. IPCMP (Inter-Processor Communication Message Protocol), which is a mechanism for IPC (Inter-Processor Communication), is also proposed and implemented as well. Proposed IPC mechanism results in faster packet-processing rate by 10% as compared to the conventional IPC mechanism using UDP/IP.
Keywords
IP Router; Routing Protocol; Distributed Processing; IPC;
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