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http://dx.doi.org/10.13089/JKIISC.2021.31.3.331

Benchmarking Korean Block Ciphers on 32-Bit RISC-V Processor  

Kwak, YuJin (Department of Information, Security and Cryptography, Kookmin University)
Kim, YoungBeom (Department of Financial Information Security, Kookmin University)
Seo, Seog Chung (Department of Financial Information Security, Kookmin University)
Publication Information
Journal of the Korea Institute of Information Security & Cryptology / v.31, no.3, 2021 , pp. 331-340 More about this Journal
Abstract
As the communication industry develops, the development of SoC (System on Chip) is increasing. Accordingly, the paradigm of technology design of industries and companies is changing. In the existing process, companies purchased micro-architecture, but now they purchase ISA (Instruction Set Architecture), and companies design the architecture themselves. RISC-V is an open instruction set based on a reduced instruction set computer. RISC-V is equipped with ISA, which can be expanded through modularization, and an expanded version of ISA is currently being developed through the support of global companies. In this paper, we present benchmarking frameworks ARIA, LEA, and PIPO of Korean block ciphers in RISC-V. We propose implementation methods and discuss performance by utilizing the basic instruction set and features of RISC-V.
Keywords
Benchmarking; ARIA; PIPO; LEA; RISC-V;
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